Searched refs:CLK_TOP_SYSPLL3_D2 (Results 1 - 25 of 45) sorted by relevance

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/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h46 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt7629-clk.h43 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmediatek,mt6795-clk.h60 #define CLK_TOP_SYSPLL3_D2 49 macro
H A Dmt6765-clk.h46 #define CLK_TOP_SYSPLL3_D2 11 macro
H A Dmt6797-clk.h57 #define CLK_TOP_SYSPLL3_D2 47 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
H A Dmt8173-clk.h62 #define CLK_TOP_SYSPLL3_D2 52 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7622.c108 FACTOR0(CLK_TOP_SYSPLL3_D2, CLK_APMIXED_MAINPLL, 1, 10),
217 CLK_TOP_SYSPLL3_D2,
228 CLK_TOP_SYSPLL3_D2,
261 CLK_TOP_SYSPLL3_D2
H A Dclk-mt7623.c114 FACTOR1(CLK_TOP_SYSPLL3_D2, CLK_TOP_SYSPLL_D5, 1, 2),
253 CLK_TOP_SYSPLL3_D2,
266 CLK_TOP_SYSPLL3_D2,
290 CLK_TOP_SYSPLL3_D2,
462 CLK_TOP_SYSPLL3_D2,
H A Dclk-mt7629.c110 FACTOR0(CLK_TOP_SYSPLL3_D2, CLK_APMIXED_MAINPLL, 1, 10),
231 CLK_TOP_SYSPLL3_D2,
242 CLK_TOP_SYSPLL3_D2,

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