| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 86 PLL_FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", CLK_APMIXED_MAINPLL, 1, 6),
211 CLK_TOP_SYSPLL2_D2
220 CLK_TOP_SYSPLL2_D2,
232 CLK_TOP_SYSPLL2_D2,
240 CLK_TOP_SYSPLL2_D2,
362 CLK_TOP_SYSPLL2_D2,
403 CLK_TOP_SYSPLL2_D2
409 CLK_TOP_SYSPLL2_D2
|
| H A D | clk-mt8512.c | 82 FACTOR0(CLK_TOP_SYSPLL2_D2, CLK_APMIXED_MAINPLL, 1, 6),
159 CLK_TOP_SYSPLL2_D2,
182 CLK_TOP_SYSPLL2_D2
189 CLK_TOP_SYSPLL2_D2,
203 CLK_TOP_SYSPLL2_D2,
313 CLK_TOP_SYSPLL2_D2,
352 CLK_TOP_SYSPLL2_D2,
443 CLK_TOP_SYSPLL2_D2,
|
| H A D | clk-mt7623.c | 111 FACTOR1(CLK_TOP_SYSPLL2_D2, CLK_TOP_SYSPLL_D3, 1, 2),
281 CLK_TOP_SYSPLL2_D2,
362 CLK_TOP_SYSPLL2_D2,
375 CLK_TOP_SYSPLL2_D2
460 CLK_TOP_SYSPLL2_D2,
|
| H A D | clk-mt7629.c | 106 FACTOR0(CLK_TOP_SYSPLL2_D2, CLK_APMIXED_MAINPLL, 1, 6),
264 CLK_TOP_SYSPLL2_D2,
275 CLK_TOP_SYSPLL2_D2,
|
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mt8512-clk.h | 18 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 39 #define CLK_TOP_SYSPLL2_D2 29 macro
|
| H A D | mediatek,mt6795-clk.h | 57 #define CLK_TOP_SYSPLL2_D2 46 macro
|
| H A D | mt6765-clk.h | 42 #define CLK_TOP_SYSPLL2_D2 7 macro
|
| H A D | mt6797-clk.h | 53 #define CLK_TOP_SYSPLL2_D2 43 macro
|
| H A D | mt8173-clk.h | 59 #define CLK_TOP_SYSPLL2_D2 49 macro
|