Searched refs:CLK_TOP_SYSPLL (Results 1 - 12 of 12) sorted by relevance

/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt6765-clk.h35 #define CLK_TOP_SYSPLL 0 macro
H A Dmt2701-clk.h11 #define CLK_TOP_SYSPLL 1 macro
H A Dmt2712-clk.h35 #define CLK_TOP_SYSPLL 4 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h28 #define CLK_TOP_SYSPLL 15 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c102 FACTOR0(CLK_TOP_SYSPLL, CLK_APMIXED_MAINPLL, 1, 1),
736 .fdivs_offs = CLK_TOP_SYSPLL,

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