Searched refs:CLK_TOP_SSUSB_SYS_SEL (Results 1 - 19 of 19) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h91 #define CLK_TOP_SSUSB_SYS_SEL 80 macro
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8365.c455 MUX_GATE(CLK_TOP_SSUSB_SYS_SEL, ssusb_sys_parents, 0x0a0, 8, 2, 15),
683 GATE_IFR6(CLK_IFR_SSUSB_SYS, CLK_TOP_SSUSB_SYS_SEL, 9),
684 GATE_IFR6(CLK_IFR_SSUSB_REF, CLK_TOP_SSUSB_SYS_SEL, 10),
H A Dclk-mt8512.c521 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_SSUSB_SYS_SEL, ssusb_sys_parents,
780 GATE_INFRA5(CLK_INFRA_USB_SYS, CLK_TOP_SSUSB_SYS_SEL, 9),
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h95 #define CLK_TOP_SSUSB_SYS_SEL 85 macro

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