Searched refs:CLK_TOP_SPM_SEL (Results 1 - 21 of 21) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h93 #define CLK_TOP_SPM_SEL 82 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt6765-clk.h154 #define CLK_TOP_SPM_SEL 119 macro
H A Dmediatek,mt8365-clk.h97 #define CLK_TOP_SPM_SEL 87 macro
H A Dmt8192-clk.h13 #define CLK_TOP_SPM_SEL 1 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8365.c457 MUX_GATE(CLK_TOP_SPM_SEL, spm_parents, 0x0a0, 24, 1, 31),
H A Dclk-mt8512.c528 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_SPM_SEL, spm_parents,

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