Searched refs:CLK_TOP_NFIECC_SEL (Results 1 - 21 of 21) sorted by relevance
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 112 #define CLK_TOP_NFIECC_SEL 88 macro
|
| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 195 #define CLK_TOP_NFIECC_SEL 163 macro
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| H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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| H A D | mt2712-clk.h | 161 #define CLK_TOP_NFIECC_SEL 130 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 470 MUX_GATE(CLK_TOP_NFIECC_SEL, nfiecc_parents, 0x0d0, 8, 3, 15),
674 GATE_IFR6(CLK_IFR_NFIECC, CLK_TOP_NFIECC_SEL, 0),
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| H A D | clk-mt8516.c | 538 MUX(CLK_TOP_NFIECC_SEL, nfiecc_parents, 0x07c, 13, 3),
713 GATE_TOP3(CLK_TOP_RG_NFIECC, CLK_TOP_NFIECC_SEL, 18),
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