| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 440 MUX_GATE(CLK_TOP_MSDC50_0_SEL, msdc50_0_parents, 0x070, 0, 3, 7),
653 GATE_IFR5(CLK_IFR_MSDC0_SF, CLK_TOP_MSDC50_0_SEL, 0),
654 GATE_IFR5(CLK_IFR_MSDC1_SF, CLK_TOP_MSDC50_0_SEL, 1),
655 GATE_IFR5(CLK_IFR_MSDC2_SF, CLK_TOP_MSDC50_0_SEL, 2),
656 GATE_IFR5(CLK_IFR_AP_MSDC0, CLK_TOP_MSDC50_0_SEL, 7),
657 GATE_IFR5(CLK_IFR_MD_MSDC0, CLK_TOP_MSDC50_0_SEL, 8),
658 GATE_IFR5(CLK_IFR_MSDC0_SRC, CLK_TOP_MSDC50_0_SEL, 9),
|
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| H A D | mt7622-clk.h | 80 #define CLK_TOP_MSDC50_0_SEL 67 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| H A D | mt7622-clk.h | 80 #define CLK_TOP_MSDC50_0_SEL 67 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| H A D | mt7622-clk.h | 80 #define CLK_TOP_MSDC50_0_SEL 67 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| H A D | mt7622-clk.h | 80 #define CLK_TOP_MSDC50_0_SEL 67 macro
|
| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| H A D | mt7622-clk.h | 80 #define CLK_TOP_MSDC50_0_SEL 67 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| H A D | mt7622-clk.h | 80 #define CLK_TOP_MSDC50_0_SEL 67 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| H A D | mt7622-clk.h | 80 #define CLK_TOP_MSDC50_0_SEL 67 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 98 #define CLK_TOP_MSDC50_0_SEL 84 macro
|
| H A D | mt8512-clk.h | 76 #define CLK_TOP_MSDC50_0_SEL 65 macro
|
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 94 #define CLK_TOP_MSDC50_0_SEL 84 macro
|