Searched refs:CLK_TOP_MSDC30_2_SEL (Results 1 - 15 of 15) sorted by relevance

/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt8135-clk.h82 #define CLK_TOP_MSDC30_2_SEL 71 macro
H A Dmediatek,mt6795-clk.h106 #define CLK_TOP_MSDC30_2_SEL 95 macro
H A Dmt8173-clk.h108 #define CLK_TOP_MSDC30_2_SEL 98 macro
H A Dmt2701-clk.h101 #define CLK_TOP_MSDC30_2_SEL 90 macro
H A Dmt2712-clk.h145 #define CLK_TOP_MSDC30_2_SEL 114 macro
H A Dmt8192-clk.h38 #define CLK_TOP_MSDC30_2_SEL 26 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c527 MUX_GATE(CLK_TOP_MSDC30_2_SEL, msdc30_parents, 0x70, 8, 3, 15),
663 GATE_PERI0(CLK_PERI_MSDC30_2, CLK_TOP_MSDC30_2_SEL, 15),

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