| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 75 #define CLK_TOP_MFG_SEL 64 macro
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| H A D | mediatek,mt6795-clk.h | 97 #define CLK_TOP_MFG_SEL 86 macro
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| H A D | mt6765-clk.h | 135 #define CLK_TOP_MFG_SEL 100 macro
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| H A D | mt8173-clk.h | 99 #define CLK_TOP_MFG_SEL 89 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| H A D | mt2701-clk.h | 92 #define CLK_TOP_MFG_SEL 81 macro
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| H A D | mt2712-clk.h | 136 #define CLK_TOP_MFG_SEL 105 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
|
| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
|
| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 107 #define CLK_TOP_MFG_SEL 93 macro
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| H A D | mediatek,mt8365-clk.h | 75 #define CLK_TOP_MFG_SEL 65 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 430 MUX_GATE(CLK_TOP_MFG_SEL, mfg_parents, 0x050, 0, 2, 7),
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| H A D | clk-mt7623.c | 517 MUX_GATE_FLAGS(CLK_TOP_MFG_SEL, mfg_parents, 0x50, 16, 3, 23,
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