Searched refs:CLK_TOP_LVDSPLL_D8 (Results 1 - 14 of 14) sorted by relevance
/u-boot/dts/upstream/include/dt-bindings/clock/ |
H A D | mt8135-clk.h | 64 #define CLK_TOP_LVDSPLL_D8 53 macro
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H A D | mt8167-clk.h | 31 #define CLK_TOP_LVDSPLL_D8 (CLK_TOP_NR_CLK + 7) macro
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H A D | mt8173-clk.h | 44 #define CLK_TOP_LVDSPLL_D8 34 macro
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H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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H A D | mt2712-clk.h | 87 #define CLK_TOP_LVDSPLL_D8 56 macro
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/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 47 #define CLK_TOP_LVDSPLL_D8 37 macro
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/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt8365.c | 112 PLL_FACTOR(CLK_TOP_LVDSPLL_D8, "lvdspll_d8", CLK_APMIXED_LVDSPLL, 1, 8), 347 CLK_TOP_LVDSPLL_D8,
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