Searched refs:CLK_TOP_LVDSPLL_D4 (Results 1 - 14 of 14) sorted by relevance
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 63 #define CLK_TOP_LVDSPLL_D4 52 macro
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| H A D | mt8167-clk.h | 30 #define CLK_TOP_LVDSPLL_D4 (CLK_TOP_NR_CLK + 6) macro
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| H A D | mt8173-clk.h | 43 #define CLK_TOP_LVDSPLL_D4 33 macro
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| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| H A D | mt2712-clk.h | 86 #define CLK_TOP_LVDSPLL_D4 55 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 46 #define CLK_TOP_LVDSPLL_D4 36 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 111 PLL_FACTOR(CLK_TOP_LVDSPLL_D4, "lvdspll_d4", CLK_APMIXED_LVDSPLL, 1, 4),
346 CLK_TOP_LVDSPLL_D4,
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