Searched refs:CLK_TOP_LVDSPLL_D2 (Results 1 - 14 of 14) sorted by relevance
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 62 #define CLK_TOP_LVDSPLL_D2 51 macro
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| H A D | mt8167-clk.h | 29 #define CLK_TOP_LVDSPLL_D2 (CLK_TOP_NR_CLK + 5) macro
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| H A D | mt8173-clk.h | 42 #define CLK_TOP_LVDSPLL_D2 32 macro
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| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| H A D | mt2712-clk.h | 85 #define CLK_TOP_LVDSPLL_D2 54 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 45 #define CLK_TOP_LVDSPLL_D2 35 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 110 PLL_FACTOR(CLK_TOP_LVDSPLL_D2, "lvdspll_d2", CLK_APMIXED_LVDSPLL, 1, 2),
345 CLK_TOP_LVDSPLL_D2,
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