Searched refs:CLK_TOP_LVDSPLL_D16 (Results 1 - 10 of 10) sorted by relevance
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 48 #define CLK_TOP_LVDSPLL_D16 38 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 113 PLL_FACTOR(CLK_TOP_LVDSPLL_D16, "lvdspll_d16", CLK_APMIXED_LVDSPLL, 1, 16),
348 CLK_TOP_LVDSPLL_D16
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