Searched refs:CLK_TOP_IRTX_SEL (Results 1 - 20 of 20) sorted by relevance

/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h114 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h96 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt7629-clk.h110 #define CLK_TOP_IRTX_SEL 100 macro
H A Dmt7622-clk.h95 #define CLK_TOP_IRTX_SEL 83 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7622.c352 MUX_GATE(CLK_TOP_IRTX_SEL, f10m_ref_parents, 0xA0, 24, 1, 31),
452 GATE_PERI1(CLK_PERI_IRTX_PD, CLK_TOP_IRTX_SEL, 2),
H A Dclk-mt7629.c405 MUX_GATE(CLK_TOP_IRTX_SEL, irrx_parents, 0xA0, 24, 1, 31),

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