Searched refs:CLK_TOP_DSPPLL_D8 (Results 1 - 19 of 19) sorted by relevance
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
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| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
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| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
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| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
|
| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
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| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
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| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
|
| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 65 #define CLK_TOP_DSPPLL_D8 54 macro
|
| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
|
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 68 #define CLK_TOP_DSPPLL_D8 58 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 132 PLL_FACTOR(CLK_TOP_DSPPLL_D8, "dsppll_d8", CLK_APMIXED_DSPPLL, 1, 8),
357 CLK_TOP_DSPPLL_D8
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| H A D | clk-mt8512.c | 129 FACTOR0(CLK_TOP_DSPPLL_D8, CLK_APMIXED_DSPPLL, 1, 8),
305 CLK_TOP_DSPPLL_D8,
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Completed in 132 milliseconds