Searched refs:CLK_TOP_DI_SEL (Results 1 - 11 of 11) sorted by relevance

/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h128 #define CLK_TOP_DI_SEL 114 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt2701-clk.h115 #define CLK_TOP_DI_SEL 104 macro
H A Dmt2712-clk.h191 #define CLK_TOP_DI_SEL 160 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c545 MUX_GATE(CLK_TOP_DI_SEL, di_parents, 0xB0, 8, 2, 15),

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