Searched refs:CLK_TOP_CAMTG1_SEL (Results 1 - 11 of 11) sorted by relevance
/u-boot/dts/upstream/include/dt-bindings/clock/ |
H A D | mt6765-clk.h | 138 #define CLK_TOP_CAMTG1_SEL 103 macro
|
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/include/dt-bindings/clock/ |
H A D | mediatek,mt8365-clk.h | 78 #define CLK_TOP_CAMTG1_SEL 68 macro
|
/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt8365.c | 433 MUX_GATE(CLK_TOP_CAMTG1_SEL, camtg_parents, 0x050, 24, 3, 31),
|
Completed in 164 milliseconds