Searched refs:CLK_TOP_AXISEL_D4 (Results 1 - 10 of 10) sorted by relevance

/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c183 FACTOR1(CLK_TOP_AXISEL_D4, CLK_TOP_AXI_SEL, 1, 4),
650 GATE_PERI0(CLK_PERI_PWM1, CLK_TOP_AXISEL_D4, 2),
651 GATE_PERI0(CLK_PERI_PWM2, CLK_TOP_AXISEL_D4, 3),
652 GATE_PERI0(CLK_PERI_PWM3, CLK_TOP_AXISEL_D4, 4),
653 GATE_PERI0(CLK_PERI_PWM4, CLK_TOP_AXISEL_D4, 5),
654 GATE_PERI0(CLK_PERI_PWM5, CLK_TOP_AXISEL_D4, 6),
655 GATE_PERI0(CLK_PERI_PWM6, CLK_TOP_AXISEL_D4, 7),
656 GATE_PERI0(CLK_PERI_PWM7, CLK_TOP_AXISEL_D4, 8),
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h98 #define CLK_TOP_AXISEL_D4 85 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt2701-clk.h170 #define CLK_TOP_AXISEL_D4 158 macro

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