Searched refs:CLK_TOP_AUD1PLL (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt7622-clk.h61 #define CLK_TOP_AUD1PLL 49 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7622.c132 FACTOR0(CLK_TOP_AUD1PLL, CLK_APMIXED_AUD1PLL, 1, 1),
245 CLK_TOP_AUD1PLL,
295 CLK_TOP_AUD1PLL

Completed in 62 milliseconds