Searched refs:CLK_TOP_APLL1_DIV2 (Results 1 - 2 of 2) sorted by relevance

/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h128 #define CLK_TOP_APLL1_DIV2 117 macro
H A Dmt8173-clk.h133 #define CLK_TOP_APLL1_DIV2 123 macro

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