Searched refs:CLK_TOP_4MHZ (Results 1 - 20 of 20) sorted by relevance

/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h25 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt7629-clk.h22 #define CLK_TOP_4MHZ 12 macro
H A Dmt7622-clk.h24 #define CLK_TOP_4MHZ 12 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7622.c95 FACTOR0(CLK_TOP_4MHZ, CLK_APMIXED_ETH1PLL, 1, 125),
472 GATE_PCIE(CLK_PCIE_P1_OBFF_EN, CLK_TOP_4MHZ, 13),
478 GATE_PCIE(CLK_PCIE_P0_OBFF_EN, CLK_TOP_4MHZ, 19),
H A Dclk-mt7629.c89 FACTOR0(CLK_TOP_4MHZ, CLK_APMIXED_ETH1PLL, 1, 125),

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