Searched refs:CLK_IFR_DSP_UART (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h172 #define CLK_IFR_DSP_UART 17 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h170 #define CLK_IFR_DSP_UART 17 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8365.c630 GATE_IFR2(CLK_IFR_DSP_UART, CLK_TOP_UART_SEL, 26),

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