Searched refs:CLK_IFR_DEBUGSYS (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h187 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h185 #define CLK_IFR_DEBUGSYS 32 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8365.c645 GATE_IFR3(CLK_IFR_DEBUGSYS, CLK_TOP_AXI_SEL, 24),

Completed in 134 milliseconds