Searched refs:CLK_IFR_AP_MSDC0 (Results 1 - 11 of 11) sorted by relevance
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 218 #define CLK_IFR_AP_MSDC0 54 macro
|
| H A D | mediatek,mt8365-clk.h | 194 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 196 #define CLK_IFR_AP_MSDC0 41 macro
|
| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 656 GATE_IFR5(CLK_IFR_AP_MSDC0, CLK_TOP_MSDC50_0_SEL, 7),
|
Completed in 139 milliseconds