Searched refs:CLK_APMIXED_TRGPLL (Results 1 - 20 of 20) sorted by relevance
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 170 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt7623-clk.h | 184 #define CLK_APMIXED_TRGPLL 7 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 177 #define CLK_APMIXED_TRGPLL 7 macro
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| H A D | mt2701-clk.h | 182 #define CLK_APMIXED_TRGPLL 8 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 59 PLL(CLK_APMIXED_TRGPLL, 0x280, 0x28c, 0x00000001, 0,
717 GATE_ETH_HIF0(CLK_ETHSYS_GP2, CLK_APMIXED_TRGPLL, 7),
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| H A D | clk-mt7622.c | 63 PLL(CLK_APMIXED_TRGPLL, 0x344, 0x354, 0x1, 0,
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