Searched refs:CLK_APMIXED_SGMIPLL (Results 1 - 21 of 21) sorted by relevance

/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h164 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h171 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt7629-clk.h160 #define CLK_APMIXED_SGMIPLL 5 macro
H A Dmt7622-clk.h178 #define CLK_APMIXED_SGMIPLL 8 macro
/u-boot/arch/arm/mach-mediatek/mt7629/
H A Dinit.c38 [CLK_APMIXED_SGMIPLL] = 650000000,
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7622.c65 PLL(CLK_APMIXED_SGMIPLL, 0x358, 0x368, 0x1, 0,
130 FACTOR0(CLK_TOP_SGMIIPLL, CLK_APMIXED_SGMIPLL, 1, 1),
131 FACTOR0(CLK_TOP_SGMIIPLL_D2, CLK_APMIXED_SGMIPLL, 1, 2),
H A Dclk-mt7629.c59 PLL(CLK_APMIXED_SGMIPLL, 0x358, 0x368, 0x1, 0,
132 FACTOR0(CLK_TOP_SGMIIPLL_D2, CLK_APMIXED_SGMIPLL, 1, 2),

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