Searched refs:CLK_APMIXED_ETH2PLL (Results 1 - 21 of 21) sorted by relevance
/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 163 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 167 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/dts/upstream/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 159 #define CLK_APMIXED_ETH2PLL 4 macro
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H A D | mt7622-clk.h | 174 #define CLK_APMIXED_ETH2PLL 4 macro
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/u-boot/arch/arm/mach-mediatek/mt7629/ |
H A D | init.c | 37 [CLK_APMIXED_ETH2PLL] = 700000000,
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/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7629.c | 57 PLL(CLK_APMIXED_ETH2PLL, 0x314, 0x320, 0x1, 0, 515 GATE_ETH0(CLK_ETH_FE_EN, CLK_APMIXED_ETH2PLL, 6),
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H A D | clk-mt7622.c | 57 PLL(CLK_APMIXED_ETH2PLL, 0x314, 0x320, 0x1, 0,
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