Searched refs:CLK_APMIXED_AUD2PLL (Results 1 - 20 of 20) sorted by relevance
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 169 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt7623-clk.h | 188 #define CLK_APMIXED_AUD2PLL 11 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt7622-clk.h | 176 #define CLK_APMIXED_AUD2PLL 6 macro
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| H A D | mt2701-clk.h | 186 #define CLK_APMIXED_AUD2PLL 12 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 61 PLL(CLK_APMIXED_AUD2PLL, 0x334, 0x340, 0x1, 0,
133 FACTOR0(CLK_TOP_AUD2PLL, CLK_APMIXED_AUD2PLL, 1, 1),
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| H A D | clk-mt7623.c | 67 PLL(CLK_APMIXED_AUD2PLL, 0x2c0, 0x2cc, 0x00000001, 0,
177 FACTOR0(CLK_TOP_AUD2PLL_90M, CLK_APMIXED_AUD2PLL, 1, 3),
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