| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt7986-clk.h | 19 #define CLK_APMIXED_APLL2 7 macro
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| H A D | mediatek,mt7981-clk.h | 195 #define CLK_APMIXED_APLL2 7 macro
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| H A D | mt8516-clk.h | 18 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 19 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8512-clk.h | 191 #define CLK_APMIXED_APLL2 5 macro
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| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 56 PLL(CLK_APMIXED_APLL2, 0x0360, 0x0370, 0x00000001, 0, 32, 0x0364, 24,
123 PLL_FACTOR(CLK_TOP_APLL2, "apll2_ck", CLK_APMIXED_APLL2, 1, 1),
124 PLL_FACTOR(CLK_TOP_APLL2_D2, "apll2_d2", CLK_APMIXED_APLL2, 1, 2),
125 PLL_FACTOR(CLK_TOP_APLL2_D4, "apll2_d4", CLK_APMIXED_APLL2, 1, 4),
126 PLL_FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", CLK_APMIXED_APLL2, 1, 8),
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| H A D | clk-mt8512.c | 51 PLL(CLK_APMIXED_APLL2, 0x0360, 0x0370, 0x00000001,
116 FACTOR0(CLK_TOP_APLL2, CLK_APMIXED_APLL2, 1, 1),
117 FACTOR0(CLK_TOP_APLL2_D2, CLK_APMIXED_APLL2, 1, 2),
118 FACTOR0(CLK_TOP_APLL2_D3, CLK_APMIXED_APLL2, 1, 3),
119 FACTOR0(CLK_TOP_APLL2_D4, CLK_APMIXED_APLL2, 1, 4),
120 FACTOR0(CLK_TOP_APLL2_D8, CLK_APMIXED_APLL2, 1, 8),
121 FACTOR0(CLK_TOP_APLL2_D16, CLK_APMIXED_APLL2, 1, 16),
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