Searched refs:CK_TOP_WEDMCU_D5_D2 (Results 1 - 9 of 9) sorted by relevance

/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7986-clk.h80 #define CK_TOP_WEDMCU_D5_D2 26 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7986.c77 PLL_FACTOR(CK_TOP_WEDMCU_D5_D2, "wedmcu_d5_d2", CK_APMIXED_WEDMCUPLL, 1,
120 CK_TOP_WEDMCU_D5_D2, CK_TOP_CB_M_D8 };
124 CK_TOP_CB_M_D4, CK_TOP_MM_D8_D2, CK_TOP_WEDMCU_D5_D2,
131 CK_TOP_CB_M_D4, CK_TOP_WEDMCU_D5_D2 };

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