Searched refs:CK_TOP_CB_NET2_800M (Results 1 - 25 of 27) sorted by relevance

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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/include/dt-bindings/clock/
H A Dmt7986-clk.h75 #define CK_TOP_CB_NET2_800M 21 macro
H A Dmt7981-clk.h81 #define CK_TOP_CB_NET2_800M 27 macro
H A Dmt7988-clk.h197 #define CK_TOP_CB_NET2_800M 24 /* Linux CLK ID (98) */ macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7986.c70 PLL_FACTOR(CK_TOP_CB_NET2_800M, "cb_net2_800m", CK_APMIXED_NET2PLL, 1,
177 CK_TOP_CB_NET2_800M,
191 static const int eip_b_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_CB_NET2_800M };

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