Searched refs:CK_TOP_CB_APLL2_196M (Results 1 - 25 of 27) sorted by relevance

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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/include/dt-bindings/clock/
H A Dmt7986-clk.h67 #define CK_TOP_CB_APLL2_196M 13 macro
H A Dmt7981-clk.h70 #define CK_TOP_CB_APLL2_196M 16 macro
H A Dmt7988-clk.h186 #define CK_TOP_CB_APLL2_196M 13 /* Linux CLK ID (87) */ macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7981.c64 PLL_FACTOR(CK_TOP_CB_APLL2_196M, "cb_apll2_196m", CK_APMIXED_APLL2, 1,
170 CK_TOP_CB_APLL2_196M, CK_TOP_CB_MM_D4, CK_TOP_NET1_D8_D2,
214 static const int aud_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_CB_APLL2_196M };
218 static const int aud_l_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_CB_APLL2_196M,

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