Searched refs:CK_APMIXED_NET2PLL (Results 1 - 25 of 27) sorted by relevance

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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7988-clk.h321 #define CK_APMIXED_NET2PLL 5 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7988-clk.h321 #define CK_APMIXED_NET2PLL 5 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7988-clk.h321 #define CK_APMIXED_NET2PLL 5 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7988-clk.h321 #define CK_APMIXED_NET2PLL 5 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7988-clk.h321 #define CK_APMIXED_NET2PLL 5 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7986-clk.h213 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7981-clk.h234 #define CK_APMIXED_NET2PLL 1 macro
H A Dmt7988-clk.h321 #define CK_APMIXED_NET2PLL 5 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7986.c33 FIXED_CLK(CK_APMIXED_NET2PLL, CLK_XTAL, 800000000),
70 PLL_FACTOR(CK_TOP_CB_NET2_800M, "cb_net2_800m", CK_APMIXED_NET2PLL, 1,
72 PLL_FACTOR(CK_TOP_CB_NET2_D4, "cb_net2_d4", CK_APMIXED_NET2PLL, 1, 4),
73 PLL_FACTOR(CK_TOP_NET2_D4_D2, "net2_d4_d2", CK_APMIXED_NET2PLL, 1, 8),
74 PLL_FACTOR(CK_TOP_NET2_D3_D2, "net2_d3_d2", CK_APMIXED_NET2PLL, 1, 2),
H A Dclk-mt7981.c33 FIXED_CLK(CK_APMIXED_NET2PLL, CLK_XTAL, 800000000),
76 PLL_FACTOR(CK_TOP_CB_NET2_800M, "cb_net2_800m", CK_APMIXED_NET2PLL, 1,
78 PLL_FACTOR(CK_TOP_CB_NET2_D2, "cb_net2_d2", CK_APMIXED_NET2PLL, 1, 2),
79 PLL_FACTOR(CK_TOP_CB_NET2_D4, "cb_net2_d4", CK_APMIXED_NET2PLL, 1, 4),
80 PLL_FACTOR(CK_TOP_NET2_D4_D2, "net2_d4_d2", CK_APMIXED_NET2PLL, 1, 8),
81 PLL_FACTOR(CK_TOP_NET2_D4_D4, "net2_d4_d4", CK_APMIXED_NET2PLL, 1, 16),
82 PLL_FACTOR(CK_TOP_CB_NET2_D6, "cb_net2_d6", CK_APMIXED_NET2PLL, 1, 6),
H A Dclk-mt7988.c43 FIXED_CLK(CK_APMIXED_NET2PLL, CLK_XTAL, 800000000),
80 PLL_FACTOR(CK_TOP_CB_NET2_800M, "cb_net2_800m", CK_APMIXED_NET2PLL, 1,
82 PLL_FACTOR(CK_TOP_CB_NET2_D2, "cb_net2_d2", CK_APMIXED_NET2PLL, 1, 2),
83 PLL_FACTOR(CK_TOP_CB_NET2_D4, "cb_net2_d4", CK_APMIXED_NET2PLL, 1, 4),
84 PLL_FACTOR(CK_TOP_NET2_D4_D4, "net2_d4_d4", CK_APMIXED_NET2PLL, 1, 16),
85 PLL_FACTOR(CK_TOP_NET2_D4_D8, "net2_d4_d8", CK_APMIXED_NET2PLL, 1, 32),
86 PLL_FACTOR(CK_TOP_CB_NET2_D6, "cb_net2_d6", CK_APMIXED_NET2PLL, 1, 6),
87 PLL_FACTOR(CK_TOP_CB_NET2_D8, "cb_net2_d8", CK_APMIXED_NET2PLL, 1, 8),

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