/u-boot/include/configs/ |
H A D | MPC8548CDS.h | 262 #define CFG_SYS_PCIE1_IO_PHYS 0xfe3000000ull macro 264 #define CFG_SYS_PCIE1_IO_PHYS 0xe3000000 macro
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H A D | MPC837XERDB.h | 172 #define CFG_SYS_PCIE1_IO_PHYS 0xB8000000 macro
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H A D | p1_p2_rdb_pc.h | 356 #define CFG_SYS_PCIE1_IO_PHYS 0xfffc00000ull macro 358 #define CFG_SYS_PCIE1_IO_PHYS 0xffc00000 macro
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H A D | P1010RDB.h | 78 #define CFG_SYS_PCIE1_IO_PHYS 0xfffc00000ull macro 80 #define CFG_SYS_PCIE1_IO_PHYS 0xffc00000 macro
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H A D | P2041RDB.h | 225 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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H A D | kmcent2.h | 337 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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H A D | T208xRDB.h | 293 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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H A D | T102xRDB.h | 326 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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H A D | T104xRDB.h | 280 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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H A D | T4240RDB.h | 103 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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H A D | T208xQDS.h | 332 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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/u-boot/board/freescale/mpc8548cds/ |
H A D | tlb.c | 81 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/p1_p2_rdb_pc/ |
H A D | tlb.c | 53 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/p1010rdb/ |
H A D | tlb.c | 60 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/common/p_corenet/ |
H A D | tlb.c | 110 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/t102xrdb/ |
H A D | tlb.c | 62 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/t104xrdb/ |
H A D | tlb.c | 75 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/keymile/kmcent2/ |
H A D | tlb.c | 54 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/t208xqds/ |
H A D | tlb.c | 90 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/t208xrdb/ |
H A D | tlb.c | 90 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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/u-boot/board/freescale/t4rdb/ |
H A D | tlb.c | 71 SET_TLB_ENTRY(1, CFG_SYS_PCIE1_IO_VIRT, CFG_SYS_PCIE1_IO_PHYS,
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