Searched refs:value (Results 1 - 25 of 173) sorted by relevance

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/seL4-test-master/tools/nanopb/examples/using_double_on_avr/
H A Ddouble_conversion.h2 * is equal to float, i.e. 32 bit value. If you need to communicate
16 extern uint64_t float_to_double(float value);
22 extern float double_to_float(uint64_t value);
/seL4-test-master/projects/util_libs/libutils/arch_include/arm/utils/arch/
H A Dio.h21 /* Helper for forcing a read and returning a value
26 uintptr_t value; local
28 : [val]"=r"(value)
32 return value;
/seL4-test-master/projects/musllibc/src/linux/
H A Deventfd.c15 int eventfd_read(int fd, eventfd_t *value) argument
17 return (sizeof(*value) == read(fd, value, sizeof(*value))) ? 0 : -1;
20 int eventfd_write(int fd, eventfd_t value) argument
22 return (sizeof(value) == write(fd, &value, sizeof(value))) ? 0 : -1;
H A Dxattr.c4 ssize_t getxattr(const char *path, const char *name, void *value, size_t size) argument
6 return syscall(SYS_getxattr, path, name, value, size);
9 ssize_t lgetxattr(const char *path, const char *name, void *value, size_t size) argument
11 return syscall(SYS_lgetxattr, path, name, value, size);
14 ssize_t fgetxattr(int filedes, const char *name, void *value, size_t size) argument
16 return syscall(SYS_fgetxattr, filedes, name, value, size);
34 int setxattr(const char *path, const char *name, const void *value, size_t size, int flags) argument
36 return syscall(SYS_setxattr, path, name, value, size, flags);
39 int lsetxattr(const char *path, const char *name, const void *value, size_t size, int flags) argument
41 return syscall(SYS_lsetxattr, path, name, value, siz
44 fsetxattr(int filedes, const char *name, const void *value, size_t size, int flags) argument
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/seL4-test-master/projects/seL4_libs/libsel4utils/sel4_arch_include/aarch64/sel4utils/sel4_arch/
H A Dutil.h28 sel4utils_set_instruction_pointer(seL4_UserContext *regs, seL4_Word value) argument
30 regs->pc = value;
40 sel4utils_set_stack_pointer(seL4_UserContext *regs, seL4_Word value) argument
42 regs->sp = value;
46 sel4utils_set_arg0(seL4_UserContext *regs, seL4_Word value) argument
48 regs->x0 = value;
/seL4-test-master/projects/util_libs/libutils/include/utils/
H A Dconfig.h17 #define _is_set_(value) _is_set__(_macrotest_##value)
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/exynos5/
H A Dmux.c18 { .port = GPB3, .pin = 1, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV1X)},
19 { .port = GPB3, .pin = 0, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV1X)},
23 { .port = GPB3, .pin = 3, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV1X)},
24 { .port = GPB3, .pin = 2, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV1X)},
28 { .port = GPA0, .pin = 7, .value = MUXVALUE_CPD(3, PUD_PULLUP, DRV1X)},
29 { .port = GPA0, .pin = 6, .value = MUXVALUE_CPD(3, PUD_PULLUP, DRV1X)},
33 { .port = GPA1, .pin = 3, .value = MUXVALUE_CPD(3, PUD_PULLUP, DRV1X)},
34 { .port = GPA1, .pin = 2, .value = MUXVALUE_CPD(3, PUD_PULLUP, DRV1X)},
38 { .port = GPA2, .pin = 1, .value = MUXVALUE_CPD(3, PUD_PULLUP, DRV1X)},
39 { .port = GPA2, .pin = 0, .value
[all...]
/seL4-test-master/projects/seL4_libs/libsel4utils/sel4_arch_include/ia32/sel4utils/sel4_arch/
H A Dutil.h20 static inline void sel4utils_set_instruction_pointer(seL4_UserContext *regs, seL4_Word value) argument
22 regs->eip = value;
35 static inline void sel4utils_set_stack_pointer(seL4_UserContext *regs, seL4_Word value) argument
37 regs->esp = value;
/seL4-test-master/projects/musllibc/src/thread/
H A Dsem_init.c5 int sem_init(sem_t *sem, int pshared, unsigned value) argument
7 if (value > SEM_VALUE_MAX) {
11 sem->__val[0] = value;
/seL4-test-master/projects/seL4_libs/libsel4sync/include/sync/
H A Dbin_sem.h28 volatile int value; member in struct:__anon1
34 * @param value The initial value for the semaphore. Must be 0 or 1.
36 static inline int sync_bin_sem_init(sync_bin_sem_t *sem, seL4_CPtr notification, int value) argument
43 if (value != 0 && value != 1) {
44 ZF_LOGE("Binary semaphore initial value neither 0 nor 1");
54 sem->value = value;
67 return sync_bin_sem_bare_wait(sem->notification.cptr, &sem->value);
87 sync_bin_sem_new(vka_t *vka, sync_bin_sem_t *sem, int value) argument
[all...]
H A Dbin_sem_bare.h26 static inline int sync_bin_sem_bare_wait(seL4_CPtr notification, volatile int *value) { argument
28 int result = sync_atomic_decrement_safe(value, &oldval, __ATOMIC_ACQUIRE);
43 static inline int sync_bin_sem_bare_post(seL4_CPtr notification, volatile int *value) { argument
47 int val = sync_atomic_increment(value, __ATOMIC_RELEASE);
48 assert(*value <= 1);
H A Dsem-bare.h31 static inline int sync_sem_bare_wait(seL4_CPtr ep, volatile int *value) argument
37 assert(value != NULL);
39 int result = sync_atomic_decrement_safe(value, &oldval, __ATOMIC_ACQUIRE);
67 static inline int sync_sem_bare_trywait(UNUSED seL4_CPtr ep, volatile int *value) argument
69 int val = *value;
71 if (__atomic_compare_exchange_n(value, &val, val - 1, 1, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
76 val = *value;
82 static inline int sync_sem_bare_post(seL4_CPtr ep, volatile int *value) argument
88 assert(value != NULL);
92 assert(*value < INT_MA
[all...]
H A Dsem.h28 volatile int value; member in struct:__anon3
34 * @param value An initial value for the semaphore.
36 static inline int sync_sem_init(sync_sem_t *sem, seL4_CPtr ep, int value) argument
48 sem->value = value;
61 return sync_sem_bare_wait(sem->ep.cptr, &sem->value);
65 * i.e. check the semaphore value in a loop
74 return sync_sem_bare_trywait(sem->ep.cptr, &sem->value);
86 return sync_sem_bare_post(sem->ep.cptr, &sem->value);
94 sync_sem_new(vka_t *vka, sync_sem_t *sem, int value) argument
[all...]
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/exynos4/
H A Dmux.c65 { .port = GPB, .pin = 0, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
66 { .port = GPB, .pin = 1, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
67 { .port = GPB, .pin = 2, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
68 { .port = GPB, .pin = 3, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
72 { .port = GPB, .pin = 4, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
73 { .port = GPB, .pin = 5, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
74 { .port = GPB, .pin = 6, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
75 { .port = GPB, .pin = 7, .value = MUXVALUE_CPD(2, PUD_PULLUP, DRV3X)},
79 { .port = GPC1, .pin = 1, .value = MUXVALUE_CPD(5, PUD_PULLUP, DRV3X)},
80 { .port = GPC1, .pin = 2, .value
[all...]
/seL4-test-master/projects/seL4_libs/libsel4utils/sel4_arch_include/aarch32/sel4utils/sel4_arch/
H A Dutil.h32 static inline void sel4utils_set_instruction_pointer(seL4_UserContext *regs, seL4_Word value) argument
34 regs->pc = value;
42 static inline void sel4utils_set_stack_pointer(seL4_UserContext *regs, seL4_Word value) argument
44 regs->sp = value;
47 static inline void sel4utils_set_arg0(seL4_UserContext *regs, seL4_Word value) argument
49 regs->r0 = value;
/seL4-test-master/projects/seL4_libs/libsel4utils/sel4_arch_include/arm_hyp/sel4utils/sel4_arch/
H A Dutil.h32 static inline void sel4utils_set_instruction_pointer(seL4_UserContext *regs, seL4_Word value) argument
34 regs->pc = value;
42 static inline void sel4utils_set_stack_pointer(seL4_UserContext *regs, seL4_Word value) argument
44 regs->sp = value;
47 static inline void sel4utils_set_arg0(seL4_UserContext *regs, seL4_Word value) argument
49 regs->r0 = value;
/seL4-test-master/kernel/include/plat/pc99/plat/machine/
H A Dio.h14 void out8(uint16_t port, uint8_t value);
16 void out16(uint16_t port, uint16_t value);
18 void out32(uint16_t port, uint32_t value);
/seL4-test-master/projects/seL4_libs/libsel4utils/arch_include/riscv/sel4utils/arch/
H A Dutil.h30 sel4utils_set_instruction_pointer(seL4_UserContext *regs, seL4_Word value) argument
32 regs->pc = value;
48 sel4utils_set_stack_pointer(seL4_UserContext *regs, seL4_Word value) argument
50 regs->sp = value;
/seL4-test-master/projects/seL4_libs/libsel4utils/sel4_arch_include/x86_64/sel4utils/sel4_arch/
H A Dutil.h22 sel4utils_set_instruction_pointer(seL4_UserContext *regs, seL4_Word value) argument
24 regs->rip = value;
40 sel4utils_set_stack_pointer(seL4_UserContext *regs, seL4_Word value) argument
42 regs->rsp = value;
/seL4-test-master/projects/sel4_projects_libs/libsel4vm/arch_include/x86/sel4vm/arch/
H A Dguest_x86_context.h39 * @function vm_set_thread_context_reg(vcpu, reg, value)
43 * @param {uint32_t} value Value to set register with
46 int vm_set_thread_context_reg(vm_vcpu_t *vcpu, vcpu_context_reg_t reg, uint32_t value);
58 * @function vm_get_thread_context_reg(vcpu, reg, value)
62 * @param {uint32_t *} value Pointer to user supplied variable to populate register value with
65 int vm_get_thread_context_reg(vm_vcpu_t *vcpu, vcpu_context_reg_t reg, uint32_t *value);
70 * @function vm_set_vmcs_field(vcpu, field, value)
74 * @param {uint32_t} value Value to set VMCS field with
77 int vm_set_vmcs_field(vm_vcpu_t *vcpu, seL4_Word field, uint32_t value);
[all...]
/seL4-test-master/projects/sel4_projects_libs/libsel4vm/src/arch/x86/
H A Dvmcs.h13 int vm_vmcs_read(seL4_CPtr vcpu, seL4_Word field, unsigned int *value);
14 int vm_vmcs_write(seL4_CPtr vcpu, seL4_Word field, seL4_Word value);
/seL4-test-master/tools/riscv-pk/machine/
H A Dfp_emulation.h15 register int32_t value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
17 asm ("1: auipc %0, %%pcrel_hi(get_f32_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \
18 value; })
20 register uint32_t value asm("a0") = (val); \
23 asm volatile ("1: auipc %0, %%pcrel_hi(put_f32_reg); add %0, %0, %2; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp) : "r"(value), "r"(offset) : "t0"); })
26 register uintptr_t value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
28 asm ("1: auipc %0, %%pcrel_hi(get_f64_reg); add %0, %0, %1; jalr t0, %0, %%pcrel_lo(1b)" : "=&r"(tmp), "+&r"(value) :: "t0"); \
29 sizeof(uintptr_t) == 4 ? *(int64_t*)value : (int64_t)value; })
32 register uintptr_t value as
[all...]
/seL4-test-master/projects/musllibc/src/unistd/
H A Dualarm.c5 unsigned ualarm(unsigned value, unsigned interval) argument
9 .it_value.tv_usec = value
/seL4-test-master/projects/sel4_projects_libs/libsel4vm/arch_include/arm/sel4vm/arch/
H A Dguest_arm_context.h29 * @function vm_set_thread_context_reg(vcpu, reg, value)
33 * @param {uintptr_t} value Value to set TCB register with
36 int vm_set_thread_context_reg(vm_vcpu_t *vcpu, unsigned int reg, uintptr_t value);
48 * @function vm_get_thread_context_reg(vcpu, reg, value)
52 * @param {uintptr_t *} value Pointer to user supplied variable to populate TCB register value with
55 int vm_get_thread_context_reg(vm_vcpu_t *vcpu, unsigned int reg, uintptr_t *value);
60 * @function vm_set_arm_vcpu_reg(vcpu, reg, value)
64 * @param {uintptr_t *} value Value to set VCPU register with
67 int vm_set_arm_vcpu_reg(vm_vcpu_t *vcpu, seL4_Word reg, uintptr_t value);
[all...]
/seL4-test-master/kernel/include/arch/x86/arch/machine/
H A Dcpu_registers.h36 static inline void xsetbv(uint32_t reg, uint64_t value) argument
38 asm volatile("xsetbv" :: "d"((uint32_t)(value >> 32)), "a"((uint32_t)(value & 0xffffffff)), "c"(reg), "m"(control_reg_order));
41 static inline void write_xcr0(uint64_t value) argument
43 xsetbv(0, value);

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