/seL4-test-master/kernel/src/arch/arm/64/machine/ |
H A D | fpu.c | 33 if (((id_aa64pfr0 >> ID_AA64PFR0_EL1_FP) & MASK(4)) == MASK(4) || 34 ((id_aa64pfr0 >> ID_AA64PFR0_EL1_ASIMD) & MASK(4)) == MASK(4)) {
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/seL4-test-master/kernel/include/arch/arm/arch/machine/ |
H A D | hardware.h | 19 #define PAGE_BASE(_p, _s) ((_p) & ~MASK(pageBitsForSize((_s)))) 20 #define PAGE_OFFSET(_p, _s) ((_p) & MASK(pageBitsForSize((_s)))) 21 #define IS_PAGE_ALIGNED(_p, _s) (((_p) & MASK(pageBitsForSize((_s)))) == 0)
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H A D | tlb.h | 41 SMP_COND_STATEMENT(doRemoteInvalidateTranslationSingle(vptr, MASK(CONFIG_MAX_NUM_NODES))); 47 SMP_COND_STATEMENT(doRemoteInvalidateTranslationASID(hw_asid, MASK(CONFIG_MAX_NUM_NODES))); 53 SMP_COND_STATEMENT(doRemoteInvalidateTranslationAll(MASK(CONFIG_MAX_NUM_NODES)));
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/seL4-test-master/kernel/src/arch/arm/armv/armv8-a/64/ |
H A D | cache.c | 26 #define LOUU(x) (((x) >> 27) & MASK(3)) 27 #define LOC(x) (((x) >> 24) & MASK(3)) 28 #define LOUIS(x) (((x) >> 21) & MASK(3)) 29 #define CTYPE(x,n) (((x) >> (n*3)) & MASK(3)) 51 #define LINEBITS(s) (((s) & MASK(3)) + 4) 52 #define ASSOC(s) ((((s) >> 3) & MASK(10)) + 1) 53 #define NSETS(s) ((((s) >> 13) & MASK(15)) + 1)
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/seL4-test-master/projects/util_libs/libpci/src/ |
H A D | ioreg.c | 56 reg &= ~MASK(2); 62 reg &= ~MASK(2); 68 reg &= ~MASK(1); 69 libpci_out32(PCI_CONF_PORT_ADDR, 0x80000000 | bus << 16 | dev << 11 | fun << 8 | (reg & ~MASK(2))); 70 return ( libpci_in32(PCI_CONF_PORT_DATA) >> ((reg & MASK(2)) * 8) ) & 0xFFFF; 74 reg &= ~MASK(1); 80 libpci_out32(PCI_CONF_PORT_ADDR, 0x80000000 | bus << 16 | dev << 11 | fun << 8 | (reg & ~MASK(2))); 81 return ( libpci_in32(PCI_CONF_PORT_DATA) >> ((reg & MASK(2)) * 8) ) & 0xFF; 114 *bus = (port_no >> 16) & MASK(8); 117 *dev = (port_no >> 11) & MASK( [all...] |
/seL4-test-master/kernel/src/arch/arm/machine/ |
H A D | errata.c | 53 uint32_t variant = (proc_id >> 20) & MASK(4); 54 uint32_t revision = proc_id & MASK(4); 55 uint32_t part = (proc_id >> 4) & MASK(12);
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/seL4-test-master/tools/seL4/elfloader-tool/include/arch-arm/64/mode/ |
H A D | structures.h | 24 #define GET_PGD_INDEX(x) (((x) >> (ARM_2MB_BLOCK_BITS + PMD_BITS + PUD_BITS)) & MASK(PGD_BITS)) 25 #define GET_PUD_INDEX(x) (((x) >> (ARM_2MB_BLOCK_BITS + PMD_BITS)) & MASK(PUD_BITS)) 26 #define GET_PMD_INDEX(x) (((x) >> (ARM_2MB_BLOCK_BITS)) & MASK(PMD_BITS))
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/seL4-test-master/projects/util_libs/libplatsupport/src/plat/zynq7000/ |
H A D | xadc.c | 29 #define XADC_DATA_MASK MASK(16) 32 #define XADC_ADDRESS_MASK MASK(10) 33 #define XADC_VALID_ADDRESS_MASK MASK(6) 36 #define XADC_COMMAND_MASK MASK(4)
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H A D | tmu.c | 26 #define TEMPERATURE_RAW_TO_CODE(x) (((x) & MASK(16)) >> 4u)
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/seL4-test-master/kernel/src/arch/arm/armv/armv8-a/32/ |
H A D | cache.c | 27 #define LOUU(x) (((x) >> 27) & MASK(3)) 28 #define LOC(x) (((x) >> 24) & MASK(3)) 29 #define LOUIS(x) (((x) >> 21) & MASK(3)) 30 #define CTYPE(x,n) (((x) >> (n*3)) & MASK(3)) 57 #define LINEBITS(s) (( (s) & MASK(3)) + 4) 59 #define ASSOC(s) ((((s) >> 3) & MASK(10)) + 1) 61 #define NSETS(s) ((((s) >> 13) & MASK(15)) + 1)
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/seL4-test-master/kernel/src/arch/arm/armv/armv7-a/ |
H A D | cache.c | 27 #define LOUU(x) (((x) >> 27) & MASK(3)) 28 #define LOC(x) (((x) >> 24) & MASK(3)) 29 #define LOUIS(x) (((x) >> 21) & MASK(3)) 30 #define CTYPE(x,n) (((x) >> (n*3)) & MASK(3)) 57 #define LINEBITS(s) (( (s) & MASK(3)) + 4) 59 #define ASSOC(s) ((((s) >> 3) & MASK(10)) + 1) 61 #define NSETS(s) ((((s) >> 13) & MASK(15)) + 1)
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/seL4-test-master/projects/sel4_projects_libs/libsel4vm/src/arch/arm/ |
H A D | guest_memory_arch.c | 37 pa_base = ret.paddr + (ipa & MASK(bits)); 39 ipa &= ~MASK(bits);
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/seL4-test-master/projects/musllibc/src/internal/ |
H A D | floatscan.c | 34 #define MASK (KMAX-1) macro 191 a = (a+1 & MASK); 203 for (k=(z-1 & MASK); ; k=(k-1 & MASK)) { 212 if (k==(z-1 & MASK) && k!=a && !x[k]) z = k; 217 a = (a-1 & MASK); 219 z = (z-1 & MASK); 220 x[z-1 & MASK] |= x[z]; 231 k = (a+i & MASK); 236 if (x[a+i & MASK] > t [all...] |
/seL4-test-master/projects/sel4_projects_libs/libsel4vmmplatsupport/src/drivers/ |
H A D | pci.c | 77 addr->bus = (conf >> 16) & MASK(8); 78 addr->dev = (conf >> 11) & MASK(5); 79 addr->fun = (conf >> 8) & MASK(3); 80 *reg = conf & MASK(8);
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/seL4-test-master/kernel/include/arch/x86/arch/64/mode/object/ |
H A D | structures.h | 61 #define GET_PML4_INDEX(x) ( ((x) >> (PML4_INDEX_OFFSET)) & MASK(PML4_INDEX_BITS)) 63 #define GET_PDPT_INDEX(x) ( ((x) >> (PDPT_INDEX_OFFSET)) & MASK(PDPT_INDEX_BITS)) 64 #define GET_PD_INDEX(x) ( ((x) >> (PD_INDEX_OFFSET)) & MASK(PD_INDEX_BITS)) 65 #define GET_PT_INDEX(x) ( ((x) >> (PT_INDEX_OFFSET)) & MASK(PT_INDEX_BITS)) 111 #define ASID_LOW(a) (a & MASK(asidLowBits)) 112 #define ASID_HIGH(a) ((a >> asidLowBits) & MASK(asidHighBits))
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/seL4-test-master/kernel/include/arch/arm/arch/64/mode/kernel/ |
H A D | vspace.h | 23 #define VTABLE_VMID_SLOT MASK(seL4_VSpaceIndexBits) 31 #define VTABLE_SMMU_SLOT (MASK(seL4_VSpaceIndexBits) - 1) 91 poolPtr->array[asid & MASK(asidLowBits)] = 94 vspace_root_t *vtable = poolPtr->array[asid & MASK(asidLowBits)]; 135 poolPtr->array[asid & MASK(asidLowBits)] = 139 vspace_root_t *vtable = poolPtr->array[asid & MASK(asidLowBits)];
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/seL4-test-master/tools/seL4/elfloader-tool/include/arch-arm/32/mode/ |
H A D | structures.h | 29 #define GET_PT_INDEX(x) (((x) >> (PAGE_BITS)) & MASK(PT_BITS))
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/seL4-test-master/kernel/include/arch/arm/arch/32/mode/fastpath/ |
H A D | fastpath.h | 77 return (pd_cap.words[0] & MASK(5)) == 85 really checking that n + 3 <= MASK(3), i.e. n + 3 <= 7 or n <= 4. */ 90 return ((msgInfo & MASK(seL4_MsgLengthBits + seL4_MsgExtraCapBits)) 91 + 3) & ~MASK(3); 110 return (cap.words[0] & MASK(5)) == cap_reply_cap;
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/seL4-test-master/kernel/include/arch/arm/arch/32/mode/ |
H A D | hardware.h | 75 #define KERNEL_ELF_BASE (USER_TOP + (KERNEL_ELF_PADDR_BASE & MASK(22)))
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/seL4-test-master/kernel/include/arch/riscv/arch/64/mode/ |
H A D | hardware.h | 98 #define KERNEL_ELF_BASE (PPTR_TOP + (KERNEL_ELF_PADDR_BASE & MASK(30)))
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/seL4-test-master/projects/util_libs/libplatsupport/src/plat/exynos5/ |
H A D | sysreg.c | 26 void* reg = sysreg->sysreg_vaddr[offset >> 12] + (offset & MASK(12)); 36 return (volatile uint32_t*)(reg_base + (offset & MASK(12)));
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/seL4-test-master/kernel/src/arch/arm/api/ |
H A D | faults.c | 40 ipa = (addressTranslateS1CPR(va) & ~MASK(PAGE_BITS)) | (va & MASK(PAGE_BITS));
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/seL4-test-master/tools/seL4/elfloader-tool/include/ |
H A D | elfloader_common.h | 17 #define MASK(n) (BIT(n) - 1) macro 19 #define IS_ALIGNED(n, b) (!((n) & MASK(b)))
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/seL4-test-master/projects/util_libs/libplatsupport/src/mach/exynos/ |
H A D | clock.c | 45 fin = clk_set_freq(clk->parent, hz * (MASK(DIV_VAL_BITS) / 2 + 1)); 47 if (fin / (MASK(DIV_VAL_BITS) + 1) > hz) { 49 fin = clk_set_freq(clk->parent, hz * (MASK(DIV_VAL_BITS) / 2 + 1)); 52 if (div > MASK(DIV_VAL_BITS)) { 54 div = MASK(CLK_DIV_BITS);
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/seL4-test-master/kernel/include/arch/arm/arch/64/mode/object/ |
H A D | structures.h | 68 #define GET_PGD_INDEX(x) (((x) >> (PGD_INDEX_OFFSET)) & MASK(PGD_INDEX_BITS)) 69 #define GET_PUD_INDEX(x) (((x) >> (PUD_INDEX_OFFSET)) & MASK(PUD_INDEX_BITS)) 70 #define GET_UPUD_INDEX(x) (((x) >> (PUD_INDEX_OFFSET)) & MASK(UPUD_INDEX_BITS)) 71 #define GET_PD_INDEX(x) (((x) >> (PD_INDEX_OFFSET)) & MASK(PD_INDEX_BITS)) 72 #define GET_PT_INDEX(x) (((x) >> (PT_INDEX_OFFSET)) & MASK(PT_INDEX_BITS)) 119 #define ASID_LOW(a) (a & MASK(asidLowBits)) 120 #define ASID_HIGH(a) ((a >> asidLowBits) & MASK(asidHighBits))
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