Searched refs:CLK_UART0 (Results 1 - 8 of 8) sorted by relevance
| /seL4-test-master/projects/util_libs/libplatsupport/plat_include/exynos4/platsupport/plat/ |
| H A D | clock.h | 39 CLK_UART0, enumerator in enum:clk_id
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| /seL4-test-master/projects/util_libs/libplatsupport/plat_include/exynos5/platsupport/plat/ |
| H A D | clock.h | 22 CLK_UART0, enumerator in enum:clk_id
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| /seL4-test-master/projects/util_libs/libplatsupport/plat_include/zynq7000/platsupport/plat/ |
| H A D | clock.h | 40 CLK_UART0, enumerator in enum:clk_id
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| /seL4-test-master/projects/util_libs/libplatsupport/src/plat/exynos4/ |
| H A D | clock.c | 371 [CLK_UART0] = &uart0_clk,
401 [CLK_UART0] = 0 * MHZ,
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| /seL4-test-master/projects/util_libs/libplatsupport/src/plat/exynos5/ |
| H A D | clock.c | 372 [CLK_UART0 ] = &uart0_clk,
401 [CLK_UART0 ] = 64 * MHZ,
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| /seL4-test-master/projects/util_libs/libplatsupport/src/plat/zynq7000/ |
| H A D | clock.c | 759 case CLK_UART0:
820 case CLK_UART0:
1025 [CLK_UART0] = &uart0_clk,
1057 [CLK_UART0] = 25 * MHZ,
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| /seL4-test-master/projects/sel4_projects_libs/libsel4vmmplatsupport/src/plat/exynos5/devices/ |
| H A D | vclock.c | 197 [CLK_UART0 ] = CLK_DEFN(uart0_data),
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| /seL4-test-master/projects/util_libs/libplatsupport/src/mach/exynos/ |
| H A D | serial.c | 122 [PS_SERIAL0] = CLK_UART0,
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