Searched refs:CLK_GATE_PCIE (Results 1 - 2 of 2) sorted by relevance

/seL4-test-master/projects/util_libs/libplatsupport/plat_include/tk1/platsupport/plat/
H A Dclock_indexes.h272 CLK_GATE_PCIE, enumerator in enum:clock_gate
321 CLK_GATE_PCIERX0, /* Enabled on reset, CLK_GATE_PCIE is master */
322 CLK_GATE_PCIERX1, /* Enabled on reset, CLK_GATE_PCIE is master */
323 CLK_GATE_PCIERX2, /* Enabled on reset, CLK_GATE_PCIE is master */
324 CLK_GATE_PCIERX3, /* Enabled on reset, CLK_GATE_PCIE is master */
325 CLK_GATE_PCIERX4, /* Enabled on reset, CLK_GATE_PCIE is master */
326 CLK_GATE_PCIERX5, /* Enabled on reset, CLK_GATE_PCIE is master */
/seL4-test-master/projects/util_libs/libplatsupport/plat_include/tx2/platsupport/plat/
H A Dclock.h302 CLK_GATE_PCIE, enumerator in enum:clock_gate

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