Searched refs:CLK_ENB_PCIE (Results 1 - 1 of 1) sorted by relevance

/seL4-test-master/projects/util_libs/libplatsupport/plat_include/tk1/platsupport/plat/
H A Dclock_indexes.h89 #define CLK_ENB_PCIE 70 macro
151 #define CLK_ENB_PCIERX0 130 /* Enabled on reset, CLK_ENB_PCIE is master */
152 #define CLK_ENB_PCIERX1 131 /* Enabled on reset, CLK_ENB_PCIE is master */
153 #define CLK_ENB_PCIERX2 132 /* Enabled on reset, CLK_ENB_PCIE is master */
154 #define CLK_ENB_PCIERX3 133 /* Enabled on reset, CLK_ENB_PCIE is master */
155 #define CLK_ENB_PCIERX4 134 /* Enabled on reset, CLK_ENB_PCIE is master */
156 #define CLK_ENB_PCIERX5 135 /* Enabled on reset, CLK_ENB_PCIE is master */

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