Searched refs:tp (Results 1 - 25 of 31) sorted by relevance

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/seL4-refos-master/libs/libmuslc/arch/mips/
H A Dpthread_arch.h4 register char *tp __asm__("$3");
5 __asm__ __volatile__ (".word 0x7c03e83b" : "=r" (tp) );
7 char *tp;
8 __asm__ __volatile__ ("rdhwr %0, $29" : "=r" (tp) );
10 return (pthread_t)(tp - 0x7000 - sizeof(struct pthread));
/seL4-refos-master/libs/libmuslc/arch/mips64/
H A Dpthread_arch.h4 register char *tp __asm__("$3");
5 __asm__ __volatile__ (".word 0x7c03e83b" : "=r" (tp) );
7 char *tp;
8 __asm__ __volatile__ ("rdhwr %0, $29" : "=r" (tp) );
10 return (pthread_t)(tp - 0x7000 - sizeof(struct pthread));
/seL4-refos-master/libs/libmuslc/arch/mipsn32/
H A Dpthread_arch.h4 register char *tp __asm__("$3");
5 __asm__ __volatile__ (".word 0x7c03e83b" : "=r" (tp) );
7 char *tp;
8 __asm__ __volatile__ ("rdhwr %0, $29" : "=r" (tp) );
10 return (pthread_t)(tp - 0x7000 - sizeof(struct pthread));
/seL4-refos-master/libs/libmuslc/arch/or1k/
H A Dpthread_arch.h1 /* or1k use variant I, but with the twist that tp points to the end of TCB */
5 char *tp; local
6 __asm__ __volatile__ ("l.ori %0, r10, 0" : "=r" (tp) );
8 register char *tp __asm__("r10");
9 __asm__ __volatile__ ("" : "=r" (tp) );
11 return (struct pthread *) (tp - sizeof(struct pthread));
/seL4-refos-master/libs/libmuslc/arch/powerpc/
H A Dpthread_arch.h4 char *tp; local
5 __asm__ __volatile__ ("mr %0, 2" : "=r"(tp) : : );
7 register char *tp __asm__("r2");
8 __asm__ __volatile__ ("" : "=r" (tp) );
10 return (pthread_t)(tp - 0x7000 - sizeof(struct pthread));
/seL4-refos-master/libs/libmuslc/src/time/
H A Dftime.c4 int ftime(struct timeb *tp) argument
8 tp->time = ts.tv_sec;
9 tp->millitm = ts.tv_nsec / 1000000;
10 tp->timezone = tp->dstflag = 0;
/seL4-refos-master/libs/libmuslc/arch/riscv/
H A Dpthread_arch.h4 char *tp; local
5 __asm__ __volatile__ ("or %0, t1, x0" : "=r" (tp) );
7 register char *tp __asm__("t1");
9 return (struct pthread *) (tp - sizeof(struct pthread));
/seL4-refos-master/libs/libmuslc/arch/riscv_sel4/
H A Dpthread_arch.h4 char *tp; local
5 __asm__ __volatile__ ("or %0, t1, x0" : "=r" (tp) );
7 register char *tp __asm__("t1");
9 return (struct pthread *) (tp - sizeof(struct pthread));
/seL4-refos-master/libs/libmuslc/arch/powerpc64/
H A Dpthread_arch.h3 register char *tp __asm__("r13");
4 __asm__ __volatile__ ("" : "=r" (tp) );
5 return (pthread_t)(tp - 0x7000 - sizeof(struct pthread));
/seL4-refos-master/kernel/tools/
H A Dumm.py13 # We assume length tp > 0
18 tp = tps[0]
21 if tp == 'Word':
24 elif tp == 'Ptr':
28 elif tp == 'Unit':
31 elif tp == 'Array':
37 return ('Base', tp), rest
56 fl, tp = f.split(':')
57 return (fl.lstrip(), parse_type(tp.split(' ')))
84 name, tp
[all...]
/seL4-refos-master/libs/librefossys/src/
H A Dsys_timer.c71 struct timespec *tp = va_arg(ap, struct timespec *); local
72 if (!tp) {
94 tp->tv_sec = ns / 1000000000UL;
95 tp->tv_nsec = ns % 1000000000UL;
97 tp->tv_sec = 0;
98 tp->tv_nsec = 0;
/seL4-refos-master/projects/refos/impl/libs/librefossys/src/
H A Dsys_timer.c71 struct timespec *tp = va_arg(ap, struct timespec *); local
72 if (!tp) {
94 tp->tv_sec = ns / 1000000000UL;
95 tp->tv_nsec = ns % 1000000000UL;
97 tp->tv_sec = 0;
98 tp->tv_nsec = 0;
/seL4-refos-master/kernel/src/arch/riscv/machine/
H A Dregisterset.c31 tp,
/seL4-refos-master/kernel/include/arch/riscv/arch/machine/
H A Dregisterset.h24 tp = 3, TP = 3, enumerator in enum:_register
25 TLS_BASE = tp,
/seL4-refos-master/kernel/libsel4/arch_include/riscv/sel4/arch/
H A Dtypes.h64 seL4_Word tp; member in struct:seL4_UserContext_
/seL4-refos-master/libs/libsel4/arch_include/riscv/sel4/arch/
H A Dtypes.h64 seL4_Word tp; member in struct:seL4_UserContext_
/seL4-refos-master/libs/libsel4muslcsys/src/
H A Dvsyscall.c44 void *tp = va_arg(ap, void *); local
57 asm volatile("wrfsbase %0" :: "r"(tp));
63 seL4_TCB_SetTLSBase(tcb, (seL4_Word)tp);
68 boot_set_thread_area_arg = tp;
/seL4-refos-master/projects/seL4_libs/libsel4muslcsys/src/
H A Dvsyscall.c44 void *tp = va_arg(ap, void *); local
57 asm volatile("wrfsbase %0" :: "r"(tp));
63 seL4_TCB_SetTLSBase(tcb, (seL4_Word)tp);
68 boot_set_thread_area_arg = tp;
/seL4-refos-master/libs/libsel4debug/arch_include/riscv/sel4debug/arch/
H A Dregisters.h54 "tp",
95 compile_time_assert(sp_correct_position, offsetof(seL4_UserContext, tp) == 31 * sizeof(seL4_Word));
/seL4-refos-master/projects/seL4_libs/libsel4debug/arch_include/riscv/sel4debug/arch/
H A Dregisters.h54 "tp",
95 compile_time_assert(sp_correct_position, offsetof(seL4_UserContext, tp) == 31 * sizeof(seL4_Word));
/seL4-refos-master/libs/libsel4utils/src/
H A Dthread.c176 uintptr_t tp = (uintptr_t)sel4runtime_write_tls_image((void *)tls_base); local
178 sel4runtime_set_tls_variable(tp, __sel4_ipc_buffer, ipc_buffer_addr);
195 error = seL4_TCB_SetTLSBase(thread->tcb.cptr, tp);
/seL4-refos-master/projects/seL4_libs/libsel4utils/src/
H A Dthread.c176 uintptr_t tp = (uintptr_t)sel4runtime_write_tls_image((void *)tls_base); local
178 sel4runtime_set_tls_variable(tp, __sel4_ipc_buffer, ipc_buffer_addr);
195 error = seL4_TCB_SetTLSBase(thread->tcb.cptr, tp);
/seL4-refos-master/kernel/src/arch/riscv/
H A Dtraps.S41 STORE tp, (3*REGBYTES)(t0)
/seL4-refos-master/kernel/manual/tools/libsel4_tools/
H A Dbitfield_gen.py2830 def is_bit_type(tp):
2831 return umm.is_base(tp) & (umm.base_name(tp) in
2841 for path, tp in paths:
2842 tp = umm.base_name(tp)
2844 if tp in type_map:
2845 raise ValueError("Type %s has multiple parents" % tp)
2847 type_map[tp] = (toptp, path)
/seL4-refos-master/kernel/libsel4/tools/
H A Dbitfield_gen.py2830 def is_bit_type(tp):
2831 return umm.is_base(tp) & (umm.base_name(tp) in
2841 for path, tp in paths:
2842 tp = umm.base_name(tp)
2844 if tp in type_map:
2845 raise ValueError("Type %s has multiple parents" % tp)
2847 type_map[tp] = (toptp, path)

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