Searched refs:ICC_EOIR1_EL1 (Results 1 - 1 of 1) sorted by relevance

/seL4-refos-master/kernel/include/arch/arm/arch/machine/
H A Dgic_v3.h54 #define ICC_EOIR1_EL1 "S3_0_C12_C12_1" macro
65 #define ICC_EOIR1_EL1 " p15, 0, %0, c12, c12, 1" macro
285 /* Set End of Interrupt for active IRQ: ICC_EOIR1_EL1 */
286 SYSTEM_WRITE_WORD(ICC_EOIR1_EL1, active_irq[CURRENT_CPU_INDEX()]);

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