Searched refs:CNTP_CTL (Results 1 - 7 of 7) sorted by relevance
| /seL4-refos-master/libs/libplatsupport/sel4_arch_include/aarch64/platsupport/sel4_arch/ |
| H A D | util.h | 21 #define CNTP_CTL "cntp_ctl_el0" macro
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| /seL4-refos-master/projects/util_libs/libplatsupport/sel4_arch_include/aarch64/platsupport/sel4_arch/ |
| H A D | util.h | 21 #define CNTP_CTL "cntp_ctl_el0" macro
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| /seL4-refos-master/libs/libplatsupport/sel4_arch_include/aarch32/platsupport/sel4_arch/ |
| H A D | util.h | 34 #define CNTP_CTL " p15, 0, %0, c14, c2, 1" macro
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| /seL4-refos-master/projects/util_libs/libplatsupport/sel4_arch_include/aarch32/platsupport/sel4_arch/ |
| H A D | util.h | 34 #define CNTP_CTL " p15, 0, %0, c14, c2, 1" macro
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| /seL4-refos-master/libs/libplatsupport/arch_include/arm/platsupport/arch/ |
| H A D | generic_timer.h | 65 COPROC_READ_WORD(CNTP_CTL, ctrl);
71 COPROC_WRITE_WORD(CNTP_CTL, ctrl);
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| /seL4-refos-master/projects/util_libs/libplatsupport/arch_include/arm/platsupport/arch/ |
| H A D | generic_timer.h | 65 COPROC_READ_WORD(CNTP_CTL, ctrl);
71 COPROC_WRITE_WORD(CNTP_CTL, ctrl);
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| /seL4-refos-master/kernel/include/arch/arm/arch/32/mode/ |
| H A D | machine.h | 46 #define CNTP_CTL " p15, 0, %0, c14, c2, 1" /* 32-bit RW PL1 Physical Timer Control register */ macro
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