Searched refs:REG_AFSR1_EL1 (Results 1 - 1 of 1) sorted by relevance

/seL4-mcs-10.1.1/include/arch/arm/armv/armv8-a/64/armv/
H A Dvcpu.h100 #define REG_AFSR1_EL1 "afsr1_el1" macro
246 MRS(REG_AFSR1_EL1, reg);
253 MSR(REG_AFSR1_EL1, (uint32_t)reg);

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