Searched refs:fpexc (Results 1 - 4 of 4) sorted by relevance

/seL4-l4v-10.1.1/seL4/include/arch/arm/arch/32/mode/machine/
H A Dfpu.h48 word_t fpexc; local
49 MRC(FPEXC, fpexc);
50 fpexc &= ~BIT(FPEXC_EN_BIT);
51 MCR(FPEXC, fpexc);
94 word_t fpexc; local
95 MRC(FPEXC, fpexc);
96 fpexc |= BIT(FPEXC_EN_BIT);
97 MCR(FPEXC, fpexc);
102 word_t fpexc; local
105 MRC(FPEXC, fpexc);
[all...]
H A Dregisterset.h173 uint32_t fpexc; member in struct:user_fpu_state
/seL4-l4v-10.1.1/seL4/src/arch/arm/32/machine/
H A Dfpu.c30 word_t fpexc; local
36 MRC(FPEXC, fpexc);
37 fpexc |= BIT(FPEXC_EX_BIT);
38 MCR(FPEXC, fpexc);
41 MRC(FPEXC, fpexc);
43 return !!(fpexc & BIT(FPEXC_EX_BIT));
/seL4-l4v-10.1.1/seL4/src/arch/arm/object/
H A Dvcpu.c93 word_t fpexc; local
94 MRC(FPEXC, fpexc);
95 vcpu_write_reg(vcpu, seL4_VCPUReg_FPEXC, fpexc);
162 * in the VCPU's vcpu->fpexc when the VCPU is saved or disabled.
164 * We also overwrite the fpuState.fpexc with the value saved in
165 * vcpu->fpexc. Since the following scenario can happen:
171 * In the case above, the fpuState.fpexc of VM0 saves the value written
172 * by the VM1, but the vcpu->fpexc of VM0 still contains the correct
178 vcpu->vcpuTCB->tcbArch.tcbContext.fpuState.fpexc = vcpu_read_reg(vcpu, seL4_VCPUReg_FPEXC);

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