Searched refs:esp (Results 1 - 25 of 29) sorted by relevance

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/seL4-l4v-10.1.1/seL4/include/arch/x86/arch/32/mode/model/
H A Dsmp.h36 uint32_t esp = (uint32_t)getCurESP(); local
38 esp -= (uint32_t)kernel_stack_alloc;
39 cpu_id = esp >> CONFIG_KERNEL_STACK_BITS;
/seL4-l4v-10.1.1/seL4/src/arch/x86/32/
H A Dmachine_asm.S16 movl 4(%esp), %eax
30 movl 4(%esp), %eax
36 lldt 4(%esp)
41 ltr 4(%esp)
47 movl 4(%esp), %eax
53 movl 4(%esp), %eax
73 movb 8(%esp), %al
74 movw 4(%esp), %dx
80 movw 8(%esp), %ax
81 movw 4(%esp),
[all...]
H A Dtraps.S23 subl $4, %esp; /* skip TLS_BASE */ \
24 pushl 8(%esp); /* FaultIP := NextIP */ \
45 movl (x)(%esp), %esp
48 leal kernel_stack_alloc + (1 << CONFIG_KERNEL_STACK_BITS) - 4, %esp
334 testl $3, 60(%esp) # extract CPL (current privilege level)
353 cmpl $(ki_end), %esp
359 addl $4, %esp
361 andl $~0x200, 0x40(%esp)
372 addl $16, %esp
[all...]
H A Dhead.S60 leal boot_stack_top, %esp
78 leal kernel_stack_alloc + (1 << CONFIG_KERNEL_STACK_BITS) - 4, %esp
115 leal boot_stack_top, %esp
128 leal kernel_stack_alloc, %esp
131 addl %ecx, %esp
132 subl $4, %esp
/seL4-l4v-10.1.1/seL4/libsel4/sel4_arch_include/ia32/sel4/sel4_arch/
H A Dtypes.h28 seL4_Word eip, esp, eflags, eax, ebx, ecx, edx, esi, edi, ebp; member in struct:seL4_UserContext_
H A Ddeprecated.h48 seL4_Word esp; member in struct:__anon208::__anon209
66 seL4_Word esp; member in struct:__anon210::__anon211
/seL4-l4v-10.1.1/HOL4/examples/CCS/
H A Dselftest.sml72 (``rec "VM" (In "coin"..(In "ask-esp"..rec "VM1" (Out "esp-coffee"..var "VM") +
78 (In "ask-esp"..rec "VM1" (Out "esp-coffee"..var "VM") +
84 In "ask-esp"
87 (Out "esp-coffee"
92 (In "ask-esp"..rec "VM1" (Out "esp-coffee"..var "VM") +
102 (In "ask-esp"..rec "VM1" (Out "esp
[all...]
H A DExampleScript.sml139 val VM = ``rec "VM" (In "coin"..(In "ask-esp"..rec "VM1" (Out "esp-coffee"..var "VM") +
/seL4-l4v-10.1.1/HOL4/polyml/libpolyml/libffi/src/x86/
H A Dsysv.S46 movl %esp,%ebp
50 subl %ecx,%esp
53 andl $0xfffffff0, %esp
55 movl %esp,%eax
63 addl $8,%esp
163 movl %ebp,%esp
179 movl %esp, %ebp
181 subl $40, %esp
189 movl %edx, 8(%esp) /* args = __builtin_dwarf_cfa () */
191 movl %edx, 4(%esp) /*
[all...]
H A Ddarwin.S46 movl %esp,%ebp
48 subl $8,%esp
51 subl %ecx,%esp
53 movl %esp,%eax
56 subl $8,%esp
62 addl $16,%esp
174 movl %ebp,%esp
189 movl %esp, %ebp
191 subl $40, %esp
195 movl %edx, 4(%esp) /* arg
[all...]
H A Dwin32.S63 sub esp, ecx
65 mov eax, esp
71 add esp, 8
80 mov ecx, esp
81 add esp, 12
87 mov ecx, esp
88 add esp, 8
93 mov ecx, esp
94 add esp, 4
212 xchg DWORD PTR [esp
[all...]
H A Dfreebsd.S46 movl %esp,%ebp
50 subl %ecx,%esp
53 andl $0xfffffff0, %esp
55 movl %esp,%eax
63 addl $8,%esp
177 movl %ebp,%esp
193 movl %esp, %ebp
195 subl $40, %esp
199 movl %edx, 4(%esp) /* args = __builtin_dwarf_cfa () */
201 movl %edx, (%esp) /*
[all...]
/seL4-l4v-10.1.1/HOL4/polyml/libpolyml/libffi/testsuite/libffi.call/
H A Dclosure_stdcall.c53 __asm { mov sp_pre, esp }
55 asm volatile (" movl %%esp,%0" : "=g" (sp_pre));
59 __asm { mov sp_post, esp }
61 asm volatile (" movl %%esp,%0" : "=g" (sp_post));
H A Dclosure_thiscall.c53 __asm { mov sp_pre, esp }
55 asm volatile (" movl %%esp,%0" : "=g" (sp_pre));
59 __asm { mov sp_post, esp }
61 asm volatile (" movl %%esp,%0" : "=g" (sp_post));
/seL4-l4v-10.1.1/HOL4/polyml/libpolyml/
H A Dx86assembly_gas32.S36 %%esp: Stack pointer.
120 movl 8(%esp),%ebp # Address of argument vector
121 movl %esp,Arg_SaveCStack(%ebp)
125 subl $(Fr_Size-12),%esp # Allocate frame
126 movl Arg_StackPtr(%ebp),%esp
152 movl %esp,Arg_StackPtr(%ebp) # Save ML stack pointer
153 movl Arg_SaveCStack(%ebp),%esp # Restore C stack pointer
154 subl $12,%esp # Sp is just before the registers
197 movl 4(%esp),%eax
H A Dx86assembly_masm32.S30 ; esp: Stack pointer.
93 mov ebp,[8+esp] ; Address of argument vector
94 mov [ArgVector.SaveCStack+ebp],esp
98 sub esp,(Fr_size-12) ; Allocate frame
99 mov esp,[ArgVector.StackPtr+ebp]
124 mov [ArgVector.StackPtr+ebp],esp ; Save ML stack pointer
125 mov esp,[ArgVector.SaveCStack+ebp] ; Restore C stack pointer
126 sub esp,12 ; Sp is just before the registers
175 mov eax,4[esp]
/seL4-l4v-10.1.1/HOL4/polyml/mlsource/MLCompiler/CodeTree/X86Code/
H A DX86FOREIGNCALL.sml110 ebx, edi, esi, ebp and esp are saved by the called function.
132 (* Add sufficient space so that esp will be 16-byte aligned *)
150 then [moveRR{source=esp, output=edi}] (* Needed if we have to load from the stack. *)
156 storeMemory(esp, ebp, memRegStackPtr), (* Save ML stack and switch to C stack. *)
157 loadMemory(esp, ebp, memRegCStackPtr), (*moveRR{source=ebp, output=esp},*) (* Load the saved C stack pointer. *)
159 ArithToGenReg{opc=SUB, output=esp, source=NonAddressConstArg(LargeInt.fromInt stackSpace), opSize=nativeWordOpSize}
188 loadMemory(esp, ebp, memRegStackPtr) (* Restore the ML stack pointer. *)
238 (* Add sufficient space so that esp will be 16-byte aligned *)
248 moveRR{source=esp, outpu
[all...]
H A DX86CODESIG.sml39 and edi: genReg and esi: genReg and esp: genReg and ebp: genReg value
/seL4-l4v-10.1.1/HOL4/examples/machine-code/instruction-set-models/x86_64/
H A Dx64_opsemScript.sml279 seqT (seqT (read_reg ii RSP) (\esp. addT esp (write_reg ii RSP (esp + 8w))))
288 (\(w,esp). parT_unit (write_m64 ii esp w) (write_reg ii RSP esp)))`;
294 seqT (seqT (read_reg ii RSP) (\esp. addT esp (write_reg ii RSP (esp + 8w))))
303 (\(w,esp)
[all...]
/seL4-l4v-10.1.1/HOL4/examples/machine-code/lisp/
H A Dlisp_finalScript.sml338 val th = Q.INST [`df`|->`{esp - 4w}`,`f`|->`\x.w`] th
339 val th = SPEC_BOOL_FRAME_RULE th ``ALIGNED esp``
340 val post = ``xSTACK (esp-4w) [edi] * xR EDI edi * xR ESP (esp - 0x4w) * xPC (p + 0x1w)``
346 val pre = ``xSTACK (esp-4w) [w] * xR EDI edi * xR ESP esp * xPC p``
357 prog_x86Lib.x86_tools "test" [QUOTE (x86_encodeLib.x86_encode "mov edi, [esp]")]
359 val th = Q.INST [`df`|->`{esp}`,`f`|->`\x.w`] th
360 val th = SPEC_BOOL_FRAME_RULE th ``ALIGNED esp``
361 val post = ``xSTACK esp [
[all...]
/seL4-l4v-10.1.1/HOL4/examples/machine-code/instruction-set-models/x86/
H A Dx86_opsemScript.sml264 seqT (seqT (read_reg ii ESP) (\esp. addT esp (write_reg ii ESP (esp + 4w))))
273 (\(w,esp). parT_unit (write_m32 ii esp w) (write_reg ii ESP esp)))`;
279 seqT (seqT (read_reg ii ESP) (\esp. addT esp (write_reg ii ESP (esp + 4w))))
288 (\(w,esp)
[all...]
H A Dx86_Lib.sml188 val th = x86_step "BC37020000"; (* mov esp,567 *)
205 val th = x86_step "4C"; (* dec esp *)
/seL4-l4v-10.1.1/HOL4/examples/machine-code/just-in-time/
H A Djit_incrementalScript.sml53 val th2 = Q.INST [`df`|->`{esp-4w}`,`f`|->`\x.w`] th2
57 val th2 = HIDE_PRE_RULE ``xM (esp - 4w)`` th2
1699 X86_STACK (esp,xs,l) = xR ESP esp * xLIST esp xs *
1700 xSPACE esp l * cond (ALIGNED esp)`;
1704 val th = Q.INST [`df`|->`{esp}`] (DISCH ``ALIGNED esp`` th)
1708 val th = SPEC_FRAME_RULE th ``xLIST (esp
[all...]
H A Djit_opsScript.sml460 val th = Q.INST [`df`|->`{esp-4w}`] (DISCH_ALL th)
465 val th = HIDE_PRE_RULE ``xM (esp - 4w)`` th
466 val th = HIDE_POST_RULE ``xM (esp - 4w)`` th
494 xPC eip * xR ESP esp * ~xS * ~xM (esp - 0x4w) *
496 cond (ALIGNED esp /\ iEXEC (xs,l,0,ns) t)``
/seL4-l4v-10.1.1/seL4/src/arch/x86/64/
H A Dhead.S332 leal boot_stack_top, %esp
435 leal boot_stack_top, %esp

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