Searched refs:ecx (Results 1 - 25 of 37) sorted by relevance

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/seL4-l4v-10.1.1/seL4/src/arch/x86/64/
H A Dhead.S42 decl %ecx
54 movl $huge_page_error_size, %ecx
75 movl $1024, %ecx
82 movl $1024, %ecx
91 movl $4, %ecx
130 movl $1024, %ecx
137 movl $1024, %ecx
144 movl $boot_pdpt, %ecx
145 orl $0x7, %ecx
146 movl %ecx, (
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/seL4-l4v-10.1.1/HOL4/polyml/libpolyml/libffi/src/x86/
H A Dwin32.S62 mov ecx, cif_bytes
63 sub esp, ecx
80 mov ecx, esp
82 mov eax, DWORD PTR [ecx+8]
87 mov ecx, esp
90 mov edx, DWORD PTR [ecx+4]
93 mov ecx, esp
96 mov ecx, DWORD PTR [ecx]
100 xchg ecx, ea
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H A Ddarwin.S50 movl 16(%ebp),%ecx
51 subl %ecx,%esp
66 /* Load %ecx with the return type code */
67 movl 20(%ebp),%ecx
78 cmpl $FFI_TYPE_FLOAT,%ecx
106 add (%esi, %ecx, 4), %esi
127 /* Load %ecx with the pointer to storage for the return value */
128 movl 24(%ebp),%ecx
129 fstps (%ecx)
133 /* Load %ecx wit
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H A Dfreebsd.S49 movl 16(%ebp),%ecx
50 subl %ecx,%esp
67 /* Load %ecx with the return type code */
68 movl 20(%ebp),%ecx
79 cmpl $FFI_TYPE_FLOAT,%ecx
109 add (%esi, %ecx, 4), %esi
130 /* Load %ecx with the pointer to storage for the return value */
131 movl 24(%ebp),%ecx
132 fstps (%ecx)
136 /* Load %ecx wit
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H A Dsysv.S49 movl 16(%ebp),%ecx
50 subl %ecx,%esp
67 /* Load %ecx with the return type code */
68 movl 20(%ebp),%ecx
79 cmpl $FFI_TYPE_FLOAT,%ecx
107 add (%esi, %ecx, 4), %esi
128 /* Load %ecx with the pointer to storage for the return value */
129 movl 24(%ebp),%ecx
130 fstps (%ecx)
134 /* Load %ecx wit
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H A Dunix64.S170 testl $0x100, %ecx
173 testl $0x200, %ecx
175 testl $0x400, %ecx
183 shrl $12, %ecx
H A Ddarwin64.S167 testl $0x100, %ecx
170 testl $0x200, %ecx
172 testl $0x400, %ecx
180 shrl $12, %ecx
/seL4-l4v-10.1.1/seL4/libsel4/sel4_arch_include/ia32/sel4/sel4_arch/
H A Dtypes.h28 seL4_Word eip, esp, eflags, eax, ebx, ecx, edx, esi, edi, ebp; member in struct:seL4_UserContext_
H A Ddeprecated.h60 seL4_Word ecx; member in struct:__anon210::__anon211
/seL4-l4v-10.1.1/HOL4/polyml/libpolyml/
H A Dx86assembly_gas32.S31 %%ecx: General register
103 pushl %ecx; \
105 popl %ecx; \
133 movl Arg_SaveRCX(%ebp),%ecx
146 movl %ecx,Arg_SaveRCX(%ebp)
179 movl Arg_HandlerRegister(%ebp),%ecx # Get next handler into %rcx
180 jmp *(%ecx)
201 # Use %ecx and %eax because they are volatile (unlike %ebx on X86/64/Unix)
202 movl $2,%ecx
203 lock; xaddl %ecx,(
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H A Dx86assembly_masm32.S25 ; ecx: General register
106 mov ecx,[ArgVector.SaveRCX+ebp]
118 mov [ArgVector.SaveRCX+ebp],ecx
145 mov ecx,[ArgVector.HandlerRegister+ebp]
146 jmp dword ptr [ecx]
152 push ecx
154 pop ecx
176 ; Use ecx and eax because they are volatile (unlike ebx on X86/64/Unix)
177 mov ecx,2
178 lock xadd [eax],ecx
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/seL4-l4v-10.1.1/seL4/src/arch/x86/32/
H A Dhead.S125 movl smp_aps_index, %ecx
129 inc %ecx
130 shll $CONFIG_KERNEL_STACK_BITS, %ecx
131 addl %ecx, %esp
H A Dtraps.S33 pushl %ecx; \
36 movl $0x##number, %ecx; \
343 pushl %ecx
349 cmpl $0x20, %ecx # if interrupt vector is below 0x20, we have an exception
357 pushl %ecx
366 popl %ecx
418 popl %ecx
454 pushl %ecx
465 movl $val, %ecx; \
466 movl %ecx,
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/seL4-l4v-10.1.1/seL4/include/arch/x86/arch/
H A Dmachine.h138 static inline uint32_t x86_cpuid_edx(uint32_t eax, uint32_t ecx) argument
144 "=c" (ecx),
146 : "a" (eax), "c" (ecx)
151 static inline uint32_t x86_cpuid_eax(uint32_t eax, uint32_t ecx) argument
157 "=c" (ecx),
159 : "a" (eax), "c" (ecx)
164 static inline uint32_t x86_cpuid_ecx(uint32_t eax, uint32_t ecx) argument
170 "=c" (ecx),
172 : "a" (eax), "c" (ecx)
174 return ecx;
177 x86_cpuid_ebx(uint32_t eax, uint32_t ecx) argument
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/seL4-l4v-10.1.1/seL4/libsel4/arch_include/x86/sel4/arch/
H A Dtypes.h47 seL4_Word eax, ebx, ecx, edx, esi, edi, ebp; member in struct:seL4_VCPUContext_
/seL4-l4v-10.1.1/HOL4/examples/machine-code/instruction-set-models/x86/
H A Dx86_Lib.sml176 val th = x86_step "010B"; (* add [ebx], ecx *)
177 val th = x86_step "0119"; (* add [ecx], ebx *)
180 val th = x86_step "210B"; (* and [ebx], ecx *)
181 val th = x86_step "2319"; (* and ebx, [ecx] *)
184 val th = x86_step "390B"; (* cmp [ebx], ecx *)
185 val th = x86_step "3B19"; (* cmp ebx, [ecx] *)
191 val th = x86_step "090B"; (* or [ebx], ecx *)
192 val th = x86_step "0B19"; (* or ebx, [ecx] *)
195 val th = x86_step "290B"; (* sub [ebx], ecx *)
196 val th = x86_step "2B19"; (* sub ebx, [ecx] *)
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H A Dx86_decoderScript.sml492 val th = EVAL ``x86_decode(bytebits "D1E1")``; (* shl ecx, 1 *)
493 val th = EVAL ``x86_decode(bytebits "C1E108")``; (* shl ecx, 8 *)
500 val th = EVAL ``x86_decode(bytebits "010B")``; (* add [ebx], ecx *)
501 val th = EVAL ``x86_decode(bytebits "0119")``; (* add [ecx], ebx *)
504 val th = EVAL ``x86_decode(bytebits "210B")``; (* and [ebx], ecx *)
505 val th = EVAL ``x86_decode(bytebits "2319")``; (* and ebx, [ecx] *)
506 val th = EVAL ``x86_decode(bytebits "0F44C1")``; (* cmove eax, ecx *)
507 val th = EVAL ``x86_decode(bytebits "0F454104")``; (* cmovne eax, [ecx+4] *)
510 val th = EVAL ``x86_decode(bytebits "390B")``; (* cmp [ebx], ecx *)
511 val th = EVAL ``x86_decode(bytebits "3B19")``; (* cmp ebx, [ecx] *)
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H A Dprog_x86Lib.sml313 val th = x86_spec "89CD"; (* mov ebp,ecx *)
319 val th = x86_spec "8929"; (* mov [ecx],ebp *)
320 val th = x86_spec "897104"; (* mov [ecx+4],esi *)
323 val th = x86_spec "310B"; (* xor [ebx], ecx *)
331 val th = x86_spec "0F44C1"; (* cmove eax, ecx *)
/seL4-l4v-10.1.1/HOL4/examples/machine-code/lisp/
H A DdivideScript.sml12 [(3,"eax"),(4,"ecx"),(5,"edx"),(6,"ebx"),(7,"edi"),(8,"esi"),(10,"ebp")]
235 ``((let (eax,ecx,edx) = x86_div_mod (eax,ecx) in pp eax ecx edx) =
236 (let (eax,edx) = (word_div eax ecx, word_mod eax ecx) in pp eax ecx edx))``,
240 val imp = Q.SPECL [`ecx`,`eax`] arm_div_thm
243 ``ecx <> 0x0w ==> x86_div_mod_pre (eax,ecx)``,
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/seL4-l4v-10.1.1/HOL4/polyml/mlsource/MLCompiler/CodeTree/X86Code/
H A DX86FOREIGNCALL.sml120 val entryPtrReg = if isX64 then r11 else ecx
168 [ loadMemory(edi, ebp, memRegThreadSelf), moveRR{source=eax, output=esi}, moveRR{source=ebx, output=edx}, moveRR{source=r8, output=ecx} ]
169 | (X64Win, 0) => [ loadMemory(ecx, ebp, memRegThreadSelf) ]
170 | (X64Win, 1) => [ loadMemory(ecx, ebp, memRegThreadSelf), moveRR{source=eax, output=edx} ]
172 [ loadMemory(ecx, ebp, memRegThreadSelf), moveRR{source=eax, output=edx}, moveRR{source=ebx, output=r8} ]
174 [ loadMemory(ecx, ebp, memRegThreadSelf), moveRR{source=eax, output=edx}, moveRR{source=r8, output=r9}, moveRR{source=ebx, output=r8} ]
201 RaiseException { workReg=ecx }
226 if isX64 then (r11, r13) else (ecx, edi)
262 [ moveRR{source=eax, output=edi}, moveRR{source=ebx, output=esi}, moveRR{source=r8, output=edx}, moveRR{source=r9, output=ecx} ]
263 | (X64Win, 1) => [ moveRR{source=eax, output=ecx} ]
[all...]
H A DX86CODESIG.sml38 val eax: genReg and ebx: genReg and ecx: genReg and edx: genReg value
131 | ShiftVariable of { shiftType: shiftType, output: genReg } (* Shift amount is in ecx *)
/seL4-l4v-10.1.1/HOL4/examples/machine-code/compiler/demo/
H A Dcompiler_demoScript.sml108 [(3,"eax"),(4,"ecx"),(5,"edx"),(6,"ebx"),(7,"edi"),(8,"esi"),(9,"ebp")]
/seL4-l4v-10.1.1/HOL4/examples/l3-machine-code/x64/prog/
H A Dx64_progLib.sml280 cmovb r8d, ecx ; 44 0f 42 c1
289 mov ecx, [rsi+rax*4+0x4] ; 8b 4c 86 04`
/seL4-l4v-10.1.1/HOL4/examples/machine-code/instruction-set-models/x86_64/
H A Dx64_opsemScript.sml420 (seqT (read_reg ii RCX) (\ecx. constT (ecx - 1w)))))
/seL4-l4v-10.1.1/HOL4/examples/machine-code/compiler/
H A Dcodegen_x86Lib.sml8 val x86_regs = ref [(0,"eax"), (1,"ecx"), (2,"edx"), (3,"ebx"),

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