Searched refs:reg_base (Results 1 - 5 of 5) sorted by relevance

/seL4-camkes-master/projects/util_libs/libplatsupport/src/plat/exynos5/
H A Dsysreg.c33 void* reg_base; local
34 reg_base = sysreg->pwrreg_vaddr[offset >> 12];
35 if (reg_base) {
36 return (volatile uint32_t*)(reg_base + (offset & MASK(12)));
/seL4-camkes-master/projects/util_libs/libplatsupport/src/plat/exynos4/
H A Dsrc.c47 void* reg_base; local
48 reg_base = src->pwrreg_vaddr[offset >> 12];
49 if (reg_base) {
50 return (volatile uint32_t*)(reg_base + (offset & MASK(12)));
/seL4-camkes-master/projects/util_libs/libplatsupport/src/mach/nvidia/
H A Dtimer.c67 if (tmr->reg_base) {
68 ps_pmem_unmap(&tmr->ops, tmr->timer_pmem, (void *) tmr->reg_base);
131 tmr->reg_base = (uintptr_t) ps_pmem_map(&tmr->ops, pmem, false, PS_MEM_NORMAL);
132 if (tmr->reg_base == 0) {
197 tmr->tmr_map = (void *)(tmr->reg_base + NV_TMR_ID_OFFSET);
198 tmr->tmrus_map = (void *)(tmr->reg_base + TMRUS_OFFSET);
199 tmr->tmr_shared_map = (void *) tmr->reg_base + TMR_SHARED_OFFSET;
/seL4-camkes-master/projects/util_libs/libplatsupport/mach_include/nvidia/platsupport/mach/
H A Dtimer.h50 uintptr_t reg_base; member in struct:nv_tmr
/seL4-camkes-master/kernel/src/plat/pc99/machine/
H A Dacpi.c51 uint32_t reg_base[2]; member in struct:acpi_dmar_drhd
75 uint32_t reg_base[2]; member in struct:acpi_dmar_rmrr
466 reg_basel = ((acpi_dmar_drhd_t *)acpi_dmar_header)->reg_base[0];
467 reg_baseh = ((acpi_dmar_drhd_t *)acpi_dmar_header)->reg_base[1];
470 printf("ACPI: DMAR_DRHD reg_base exceeds 32 bit, disabling IOMMU support\n");
482 if (acpi_dmar_rmrr->reg_base[1] != 0 ||
525 rmrr_list->entries[rmrr_count].base = acpi_dmar_rmrr->reg_base[0];

Completed in 92 milliseconds