Searched refs:ctrl (Results 1 - 24 of 24) sorted by relevance

/seL4-camkes-master/projects/seL4_projects_libs/libsel4vchan/include/sel4vchan/
H A Dlibvchan.h50 int libvchan_wait(libvchan_t *ctrl);
53 int libvchan_data_ready(libvchan_t *ctrl);
56 int libvchan_buffer_space(libvchan_t *ctrl);
60 * @param ctrl The vchan control structure
65 int libvchan_recv(libvchan_t *ctrl, void *data, size_t size);
70 * @param ctrl The vchan control structure
75 int libvchan_send(libvchan_t *ctrl, const void *data, size_t size);
79 * @param ctrl The vchan control structure
85 int libvchan_read(libvchan_t *ctrl, void *data, size_t size);
90 * @param ctrl Th
[all...]
H A Dvchan_copy.h65 int libvchan_readwrite(libvchan_t *ctrl, void *data, size_t size, int cmd, int stream);
H A Dvchan_component.h45 libvchan_t *link_vchan_comp(libvchan_t *ctrl, camkes_vchan_con_t *vchan_com);
/seL4-camkes-master/projects/seL4_projects_libs/libsel4vchan/src/
H A Dvchan_component.c18 libvchan_t *link_vchan_comp(libvchan_t *ctrl, camkes_vchan_con_t *vchan_com) argument
20 if (ctrl == NULL) {
25 ctrl->con = vchan_com;
29 .v.dest = ctrl->domain_num,
30 .v.port = ctrl->port_num,
31 .server = ctrl->is_server,
34 res = ctrl->con->connect(t);
36 free(ctrl);
39 return ctrl;
80 int libvchan_write(libvchan_t *ctrl, cons argument
85 libvchan_read(libvchan_t *ctrl, void *data, size_t size) argument
90 libvchan_send(libvchan_t *ctrl, const void *data, size_t size) argument
95 libvchan_recv(libvchan_t *ctrl, void *data, size_t size) argument
126 get_vchan_ctrl_databuf(libvchan_t *ctrl, int action) argument
152 libvchan_readwrite(libvchan_t *ctrl, void *data, size_t size, int cmd, int stream) argument
249 libvchan_wait(libvchan_t *ctrl) argument
263 libvchan_close(libvchan_t *ctrl) argument
275 libvchan_is_open(libvchan_t *ctrl) argument
287 libvchan_is_eof(libvchan_t *ctrl) argument
298 libvchan_data_ready(libvchan_t *ctrl) argument
310 libvchan_buffer_space(libvchan_t *ctrl) argument
[all...]
/seL4-camkes-master/projects/util_libs/libplatsupport/arch_include/arm/platsupport/arch/
H A Dgeneric_timer.h64 uintptr_t ctrl; local
65 COPROC_READ_WORD(CNTP_CTL, ctrl);
66 return ctrl;
69 static inline void generic_timer_write_ctrl(uintptr_t ctrl) argument
71 COPROC_WRITE_WORD(CNTP_CTL, ctrl);
76 uintptr_t ctrl = generic_timer_read_ctrl(); local
77 generic_timer_write_ctrl(ctrl | bits);
82 uintptr_t ctrl = generic_timer_read_ctrl(); local
83 generic_timer_write_ctrl(ctrl & bits);
/seL4-camkes-master/kernel/src/drivers/timer/
H A Dpriv_timer.c28 priv_timer->ctrl = 0;
33 priv_timer->ctrl |= ((PRESCALE) << (TMR_CTRL_PRESCALE))
37 priv_timer->ctrl |= TMR_CTRL_ENABLE;
/seL4-camkes-master/kernel/include/drivers/timer/
H A Darm_priv.h15 uint32_t ctrl; member in struct:timer
/seL4-camkes-master/projects/util_libs/libplatsupport/src/plat/bcm2837/
H A Dsystem_timer.c74 timer->regs->ctrl = BIT(SYSTEM_TIMER_MATCH);
80 if (time >= ns && !(timer->regs->ctrl & BIT(SYSTEM_TIMER_MATCH))) {
81 timer->regs->ctrl = BIT(SYSTEM_TIMER_MATCH);
94 timer->regs->ctrl = BIT(SYSTEM_TIMER_MATCH);
105 timer->regs->ctrl = BIT(SYSTEM_TIMER_MATCH);
H A Dspt.c107 spt->regs->ctrl = BIT(FREE_RUN_ENABLE) | BIT(COUNTER_WIDTH_BIT);
117 spt->regs->ctrl = 0;
157 spt->regs->ctrl = BIT(COUNTER_WIDTH_BIT) | (prescale_bits << PRESCALE_BIT) |
170 spt->regs->ctrl &= ~(BIT(TIMER_ENABLE));
/seL4-camkes-master/projects/util_libs/libplatsupport/src/arch/arm/
H A Ddma330.c170 } ctrl; member in struct:dma330_map
237 return regs->ctrl.fsm & BIT(0);
239 return regs->ctrl.fsc & BIT(channel);
248 return regs->ctrl.dsr;
259 return regs->ctrl.ftm;
261 return regs->ctrl.ftc[channel];
274 v = regs->ctrl.dsr;
327 printf(" MGR PC: 0x%08x\n", regs->ctrl.dpc);
328 printf(" fs: 0x%08x\n", regs->ctrl.fsm);
329 printf(" Fault: 0x%08x\n", regs->ctrl
[all...]
/seL4-camkes-master/projects/util_libs/libplatsupport/plat_include/bcm2837/platsupport/plat/
H A Dspt.h27 uint32_t ctrl; /* Control register for timer */ member in struct:arm_timer
H A Dsystem_timer.h50 uint32_t ctrl; member in struct:__anon705
/seL4-camkes-master/projects/util_libs/libplatsupport/src/plat/zynq7000/
H A Ddevcfg.h29 uint32_t ctrl; // 0x0000 Control member in struct:devcfg_regs
H A Dclock.c315 set_divs(volatile uint32_t* ctrl, uint8_t div0, uint8_t div1) argument
318 old_div0 = CLK_GET_DIVISOR(0, *ctrl);
320 CLK_SET_DIVISOR(0, *ctrl, div0);
321 CLK_SET_DIVISOR(1, *ctrl, div1);
323 CLK_SET_DIVISOR(1, *ctrl, div1);
324 CLK_SET_DIVISOR(0, *ctrl, div0);
330 set_div(volatile uint32_t* ctrl, uint8_t div0) argument
332 CLK_SET_DIVISOR(0, *ctrl, div0);
425 _decode_pll(clk_t* clk, volatile uint32_t** ctrl, volatile uint32_t** cfg) argument
429 *ctrl
[all...]
/seL4-camkes-master/projects/projects_libs/libusbdrivers/include/usb/drivers/
H A Dcdc.h54 void acm_set_ctrl_line_state(usb_dev_t *udev, uint8_t ctrl);
/seL4-camkes-master/projects/seL4_projects_libs/libsel4vmmplatsupport/src/arch/arm/devices/
H A Dvusb.c198 static int ctrl_to_xact(usb_ctrl_regs_t *ctrl, struct xact *xact) argument
201 xact[0].vaddr = (void *)&ctrl->req;
204 xact[1].len = ctrl->req.wLength;
205 xact[1].vaddr = (void *)&ctrl->req_reply;
207 if (ctrl->req.bmRequestType & BIT(7)) {
217 static int root_hub_ctrl_start(usb_host_t *hcd, usb_ctrl_regs_t *ctrl) argument
223 err = ctrl_to_xact(ctrl, xact);
231 ZF_LOGD("usb ctrl complete len %d\n", len);
/seL4-camkes-master/projects/projects_libs/libusbdrivers/src/plat/imx6/
H A Dehci-imx6.c84 struct usb_sct ctrl; /* 0x30 */ member in struct:usb_phy_regs
292 phy_regs->ctrl.clr = PHYCTRL_CLKGATE;
294 phy_regs->ctrl.set = PHYCTRL_SFTRST;
297 phy_regs->ctrl.clr = PHYCTRL_SFTRST;
302 phy_regs->ctrl.set = PHYCTRL_ENUTMIL3 | PHYCTRL_ENUTMIL2;
/seL4-camkes-master/tools/seL4/elfloader-tool/src/plat/imx6/
H A Dplatform_init.c154 uint32_t ctrl; member in struct:gicc_map
186 gicc->ctrl = 0;
/seL4-camkes-master/tools/seL4/elfloader-tool/src/plat/tk1/
H A Dplatform_init.c230 uint32_t ctrl; member in struct:gicc_map
262 gicc->ctrl = 0;
/seL4-camkes-master/projects/util_libs/libplatsupport/src/plat/imx6/
H A Dclock.c179 uint32_t ctrl; member in struct:pll2_regs
335 assert((regs->ctrl & PLL2_CTRL_LOCK) != 0);
336 assert((regs->ctrl & PLL2_CTRL_BYPASS) == 0);
337 assert((regs->ctrl & PLL2_CTRL_PWR_DOWN) == 0);
341 if (regs->ctrl & PLL2_CTRL_DIVSEL) {
/seL4-camkes-master/projects/projects_libs/libusbdrivers/src/drivers/
H A Dcdc.c474 void acm_set_ctrl_line_state(usb_dev_t *udev, uint8_t ctrl) argument
479 SET_CONTROL_LINE_STATE, ctrl, NULL, 0);
/seL4-camkes-master/projects/util_libs/libethdrivers/src/plat/imx6/
H A Docotp_ctrl.c64 uint32_t ctrl; /* 000 */ member in struct:ocotp_regs
/seL4-camkes-master/projects/util_libs/libethdrivers/src/plat/imx6/uboot/
H A Dimx-regs.h335 uint32_t ctrl; member in struct:cspi_regs
376 uint32_t ctrl; member in struct:iim_regs
/seL4-camkes-master/projects/util_libs/libplatsupport/src/plat/pc99/
H A Dkeyboard_vkey.h347 int16_t keycode_info_char_modifier(keycode_info_t *info, bool ctrl, bool shift);

Completed in 198 milliseconds