Searched refs:SYS_CTRL_PLLA_CTRL0 (Results 1 - 4 of 4) sorted by relevance

/openwrt/package/boot/uboot-oxnas/files/arch/arm/cpu/arm1136/nas782x/
H A Dclock.c52 setbits_le32(SYS_CTRL_PLLA_CTRL0, PLL_BYPASS);
59 SYS_CTRL_PLLA_CTRL0);
71 printf(" plla_ctrl0 : %08x\n", readl(SYS_CTRL_PLLA_CTRL0));
76 clrbits_le32(SYS_CTRL_PLLA_CTRL0, PLL_BYPASS); // Take PLL out of bypass
/openwrt/package/boot/uboot-oxnas/files/arch/arm/include/asm/arch-nas782x/
H A Dsysctl.h28 #define SYS_CTRL_PLLA_CTRL0 (SYS_CONTROL_BASE + 0x1F0) macro
/openwrt/target/linux/oxnas/files/drivers/clk/
H A Dclk-oxnas.c46 pll0 = readl_relaxed(SYS_CTRL_PLLA_CTRL0);
/openwrt/target/linux/oxnas/files/arch/arm/mach-oxnas/include/mach/
H A Dhardware.h50 #define SYS_CTRL_PLLA_CTRL0 IOMEM(OXNAS_SYSCRTL_BASE_VA + 0x1F0) macro

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