Searched refs:DDR_PHY_TIMING_I_CE (Results 1 - 2 of 2) sorted by relevance

/openwrt/package/boot/uboot-oxnas/files/board/ox820/
H A Dddr.c455 writel(DDR_PHY_TIMING_I_CE | reg, DDR_PHY_TIMING);
456 writel(DDR_PHY_TIMING_CK | DDR_PHY_TIMING_I_CE | reg,
458 writel(DDR_PHY_TIMING_I_CE | reg, DDR_PHY_TIMING);
H A Dddr.h130 #define DDR_PHY_TIMING_I_CE (1 << 16) macro

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